Panasonic FP-E Owner's manual

Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: [email protected]

Table of Contents

Chapter 1 Relays, Memory Areas and Constants

1.1 Table of Relays, Memory Areas and Constants 1 -2........................

1.1.1 FP0/FP−e1-2................................................

1.1.2 FP0R 1 -7....................................................

1.1.3 FPΣ1-9.....................................................

1.1.4 FP−X1-13...................................................

1.1.5 FP2 1 -15.....................................................

1.1.6 FP2SH 1 -17..................................................

1.1.7 FP10SH 1 -19.................................................

1.1.8 Relay Numbers 1 -21..........................................

1.2 Explanation of Relays 1 -24.............................................

1.2.1 External Input Relays (X) 1 -24..................................

1.2.2 External Output Relays (Y) 1 -25................................

1.2.3 Internal Relays (R) 1 -26........................................

1.2.4 Special Internal Relays 1 -28....................................

1.2.5 Link Relays (L) for FPΣ,FP−X, FP0R 1 -29.......................

1.2.6 Link Relays (L) for FP2/FP2SH/FP10SH 1 -31.....................

1.2.7 Timer (T) 1 -35................................................

1.2.8 Counter (C) 1 -36..............................................

1.2.9 Items Shared by the Timer and Counter 1 -37.....................

1.2.10 Pulse Relays (P) 1 -39.........................................

1.2.11 Error Alarm Relays (E) 1 -41....................................

1.3 Explanation of Memory Areas 1 -44......................................

1.3.1 Data Register (DT) 1 -44.......................................

1.3.2 Special Data Registers (DT) 1 -46...............................

1.3.3 File Registers (FL) 1 -48........................................

1.3.4 WX, WY, WR and WL 1 -49.....................................

1.3.5 Link Data Registers (LD) for FPΣ/FP−X/FP0R 1 -50................

1.3.6 Link Data Registers (LD) for FP2/FP2SH/FP10SH 1 -52............

1.3.7 Set Value Area for Timer/Counter (SV) 1 -56......................

1.3.8 Elapsed Value Area for Timer/Counter (EV) 1 -57..................

1.3.9 Index Registers (IX, IY) (for FP0, FP−e) 1 -58.....................

1.3.10 Index Registers (I0 to ID) (for FPΣ/FP−X/FP0R) 1 -61..............

1.3.11 Index Registers (I0 to ID) (for FP2, FP2SH and FP10SH) 1 -62......

1.4 Explanation of Constants 1 -72..........................................

1.4.1 Integer Type Decimal Constants (K) 1 -72.........................

1.4.2 Hexadecimal Constants (H) 1 -73................................

1.4.3 Floating Point Type Real Numbers (f) 1 -74.......................

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Table of Contents

1.4.4 BCD Type Real Numbers (H) (for FP2, FP2SH and FP10SH) 1 -79...

1.4.5 Character Constants (M) 1 -80..................................

1.5 Data Ranges Which can be Handled in the PLC 1 -81......................

1.5.1 Data Ranges Which can be Handled in the PLC 1 -81..............

1.5.2 Overflow and Underflow 1 -84...................................

Chapter 2 Basic Instructions

2.1 Composition of Basic Instructions 2 - 3...................................

2.1.1 Sequence Basic Instructions 2 - 3................................

2.1.2 Basic Function Instructions 2 - 4.................................

2.1.3 Control Instructions 2 - 4........................................

2.1.4 Data Compare Instructions 2 - 5.................................

2.2 Number of Steps in the FP2, FP2SH and FP10SH 2 - 6.....................

Chapter 3 High−level Instructions

3.1 Composition of High-level Instructions 3 - 3...............................

3.1.1 Composition 3 - 3..............................................

3.1.2 High-level Instruction Numbers and Program Input 3 - 4.............

3.1.3 High-level Instruction and Execution Condition (Trigger) 3 - 5........

3.1.4 “F” and “P” Type High-level Instructions 3 - 6......................

Chapter 4 Precautions Concerning Programs

4.1 Changing the Set Value of Timer/Counter During RUN 4 -3.................

4.1.1 Method of Rewriting Constant in the Program 4 -3.................

4.1.2 Method of Rewriting a Value in the Set Value Area 4 -5.............

4.2 Use of Duplicated Output 4 -8...........................................

4.2.1 Duplicated Output 4 -8.........................................

4.2.2 When Output is Repeated with an OT, KP, SET, or RST

Instruction 4 -9................................................

4.3 Leading Edge Detection Method 4 -10...................................

4.3.1 Instructions of Leading Edge Detection Method 4 -10...............

4.3.2 Operation and Precautions at Run Start Time 4 -11................

4.3.3 Precautions when Using a Control Instruction 4 -13................

4.4 Operation Errors 4 -15.................................................

4.4.1 Operation Errors 4 -15.........................................

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Table of Contents

iii

4.4.2 Operation Mode when an Operation Error Occurs 4 -16.............

4.4.3 Dealing with Operation Errors 4 -17..............................

4.4.4 Points to Check in Program 4 -18................................

4.5 Handling Index Registers 4 -19..........................................

4.5.1 Index Registers 4 -19..........................................

4.5.2 Memory Areas Which can be Modified with Index Registers 4 -20....

4.5.3 Example of Using an Index Register 4 -21........................

4.6 Handling BCD Data 4 -25..............................................

4.6.1 BCD Data 4 -25...............................................

4.6.2 Handling BCD Data in the Programmable Controller 4 -25...........

4.7 Precautions for Programming 4 -27......................................

4.8 Rewrite Function During RUN 4 -28......................................

4.8.1 Operation of Rewrite During RUN 4 -28...........................

4.8.2 Cases Where Rewriting During Run is not Possible 4 -29...........

4.8.3 Procedures and Operation of Rewrite During RUN 4 -31............

4.9 Processing During Forced Input and Output 4 -32.........................

4.9.1 Processing when forced input/output is initiated during RUN 4 -32....

4.10 Second Program Area (FP2SH, FP10SH) 4 -34...........................

Chapter 5 Appendix

5.1 System Registers / Special Internal Relays / Special Data Registers....... 5−3

5.1.1 Table of System Registers for FP0 5−5...............................

5.1.2 Table of Special Internal Relays for FP0 5−15.........................

5.1.3 Table of Special Data Registers for FP0 5−18.........................

5.1.4 Table of System Registers for FP−e5−28............................

5.1.5 Table of Special Internal Relays for FP−e5−32.......................

5.1.6 Table of Special Data Registers for FP−e5−36........................

5.1.7 Table of System Registers for FP0R 5−43............................

5.1.8 Table of Special Internal Relays for FP0R 5−49.......................

5.1.9 Table of Special Data Registers for FP0R 5−59.......................

5.1.10 Table of System Registers for FPΣ5−78............................

5.1.11 Table of Special Internal Relays for FPΣ5−84.......................

5.1.12 Table of Special Data Registers for FPΣ5−93.......................

5.1.13 Table of System Registers for FP−X5−107.........................

5.1.14 Table of Special Internal Relays for FP−X5−119.....................

5.1.15 Table of Special Data Registers for FP−X5−130....................

5.1.16 Table of System Registers for FP2/FP2SH/FP10SH 5−151...........

5.1.17 Table of Special Internal Relays for

FP1/FP−M/FP2/FP2SH/FP10SH/FP3 5−165........................................................

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Table of Contents

5.1.18 Special Data Registers for FP2/FP2SH/FP3/FP10SH 5−176..........

5.2 Table of Basic Instructions 5−201.........................................

5.3 Table of High−level Instructions 5−209.....................................

5.4 Table of Error codes 5−229...............................................

5.5 MEWTOCOL−COM Communication Commands 5−242......................

5.6 Hexadecimal/Binary/BCD 5−243..........................................

5.7 ASCII Codes 5−244.....................................................

Record of changes R-1...............................................

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Table of Contents

Basic Instructions

Sequence basic instructions

ST Start 2 −8...................

ST/ Start Not 2 −8...............

OT Out 2 −8....................

/ Not 2 −10...................

AN AND 2 −11..................

AN/ AND Not 2 −11..............

OR OR 2 −12...................

OR/ OR Not 2 −12................

ST↑Leading edge start 2 −14......

ST↓Trailing edge start 2 −14......

AN↑Leading edge AND 2 −14.....

AN↓Trailing edge AND 2 −14......

OR↑Leading edge OR 2 −14.......

OR↓Trailing edge OR 2 −14.......

OT↑Leading edge out 2 −16.......

OT↓Trailing edge out 2 −16.......

ALT Alternative out 2 −18.........

ANS AND stack 2 −19.............

ORS OR stack 2 −21..............

PSHS Push stack 2 −23............

RDS Read stack 2 −23............

POPS Pop stack 2 −23.............

DF Leading edge differential 2 −26

DF/ Trailing edge differential 2 −26.

DFI Leading edge differential

(initial execution type) 2 −30...

SET Set 2 −32...................

RST Reset 2 −32.................

KP Keep 2 −34.................

NOP No operation 2 −35...........

Basic function instructions

TML On−delay timer TML 2 −36....

TMR On−delay timer TMR 2 −42....

TMX On−delay timer TMX 2 −42....

TMY On−delay timer TMY 2 −42....

CT Counter 2 −48...............

SR Shift register 2 −54...........

Control instructions

MC Master control relay 2 −57.....

MCE Master control relay end 2 −57.

JP Jump 2 −61.................

LBL Label 2 −61, 2 −64..........

LOOP Loop 2 −64..................

BRK Break 2 −68.................

ED End 2 −70...................

CNDE Conditional end 2 −71........

EJECT Eject 2 −73...................

Step ladder instructions

SSTP Start step 2 −75..............

NSTL Next step 2 −75..............

NSTP Next step 2 −75..............

CSTP Clear step 2 −75.............

STPE Step end 2 −75..............

SCLR Clear multiple processes 2 −85

Subroutine instructions

CALL Subroutine call 2 −86.........

FCAL Output off type

subroutine call 2 −89.........

SUB Subroutine entry 2 −86........

RET Subroutine return 2 −86.......

Interrupt instructions

INT Interrupt 2 −91. 2 −97........

IRET Interrupt return 2 −91, 2 −97..

ICTL Interrupt control 2 −102, 2 −110

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Table of Contents

Special setting instructions

SYS1 Communication conditions

setting 2 −119...............

Password setting 2 −123......

Interrupt setting 2 −125.......

PLC link time setting 2 −127...

Change high−speed counter

operation mode 2 −129.......

MEWTOCOL−COM response

control 2 −131...............

SYS2 Change system registers

(No.40 to No.47,

No.50 to No.57) 2 −133.......

Data compare instructions

ST= 16−bit data compare

(Start) 2 −136................

ST<> 16−bit data compare

(Start) 2 −136................

ST> 16−bit data compare

(Start) 2 −136................

ST>= 16−bit data compare

(Start) 2 −136................

ST< 16−bit data compare

(Start) 2 −136................

ST<= 16−bit data compare

(Start) 2 −136................

STD= 32−bit data compare

(Start) 2 −138................

STD<> 32−bit data compare

(Start) 2 −138................

STD> 32−bit data compare

(Start) 2 −138................

STD>= 32−bit data compare

(Start) 2 −138................

STD< 32−bit data compare

(Start) 2 −138................

STD<= 32−bit data compare

(Start) 2 −138................

STF= Floating point real number data

comparison: (Start) 2 −140....

STF<> Floating point real number data

comparison: (Start) 2 −140....

STF> Floating point real number data

comparison: (Start) 2 −140....

STF>= Floating point real number data

comparison: (Start) 2 −140....

STF< Floating point real number data

comparison: (Start) 2 −140....

STF<= Floating point real number data

comparison: (Start) 2 −140....

AN= 16−bit data compare

(AND) 2 −142................

AN<> 16−bit data compare

(AND) 2 −142................

AN> 16−bit data compare

(AND) 2 −142................

AN>= 16−bit data compare

(AND) 2 −142................

AN< 16−bit data compare

(AND) 2 −142................

AN<= 16−bit data compare

(AND) 2 −142................

AND= 32−bit data compare

(AND) 2 −144................

AND<> 32−bit data compare

(AND) 2 −144................

AND> 32−bit data compare

(AND) 2 −144................

AND>= 32−bit data compare

(AND) 2 −144................

AND< 32−bit data compare

(AND) 2 −144................

AND<= 32−bit data compare

(AND) 2 −144................

ANF= Floating point real number data

comparison: (AND) 2 −146....

ANF<> Floating point real number data

comparison: (AND) 2 −146....

ANF> Floating point real number data

comparison: (AND) 2 −146....

ANF>= Floating point real number data

comparison: (AND) 2 −146....

ANF< Floating point real number data

comparison: (AND) 2 −146....

ANF<= Floating point real number data

comparison: (AND) 2 −146....

OR= 16−bit data compare

(OR) 2 −148.................

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Table of Contents

vii

OR<> 16−bit data compare

(OR) 2 −148.................

OR> 16−bit data compare

(OR) 2 −148.................

OR>= 16−bit data compare

(OR) 2 −148.................

OR< 16−bit data compare

(OR) 2 −148.................

OR<= 16−bit data compare

(OR) 2 −148.................

ORD= 32−bit data compare

(OR) 2 −150.................

ORD<> 32−bit data compare

(OR) 2 −150.................

ORD> 32−bit data compare

(OR) 2 −150.................

ORD>= 32−bit data compare

(OR) 2 −150.................

ORD< 32−bit data compare

(OR) 2 −150.................

ORD<= 32−bit data compare

(OR) 2 −150.................

ORF= Floating point real number data

comparison: (OR) 2 −152.....

ORF<> Floating point real number data

comparison: (OR) 2 −152.....

ORF> Floating point real number data

comparison: (OR) 2 −152.....

ORF>= Floating point real number data

comparison: (OR) 2 −152.....

ORF< Floating point real number data

comparison: (OR) 2 −152.....

ORF<= Floating point real number data

comparison: (OR) 2 −152.....

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Table of Contents

viii

High−level Instructions

Data transfer instructions

F0 MV 16-bit data move 3 −8..........................................

P0 PMV

F1 DMV 32-bit data move 3 −10........................................

P1 PDMV

F2 MV/ 16-bit data invert and move 3 −12..............................

P2 PMV/

F3 DMV/ 32-bit data invert and move 3 −14..............................

P3 PDMV/

F4 GETS Reading of head word No. of the specified slot. 3 −16.............

P4 PGETS

F5 BTM Bit data move 3 −17..........................................

P5 PBTM

F6 DGT Hexadecimal digit data move 3 −21.............................

P6 PDGT

F7 MV2 Two 16-bit data move 3 −25...................................

P7 PMV2

F8 DMV2 Two 32-bit data move 3 −27...................................

P8 PDMV2

F10 BKMV Block move 3 −29............................................

P10 PBKMV

F11 COPY Block copy 3 −31.............................................

P11 PCOPY

F12 ICRD Data read from EEPROM 3 −33................................

Data read from F−ROM 3 −35..................................

F12 ICRD Data read from IC card 3 −37..................................

P12 PICRD

P13 PICWT Data write to EEPROM 3 −39..................................

Data write to F−ROM 3 −41....................................

F13 ICWT Data write to IC card 3 −43....................................

P13 PICWT

F14 PGRD Program read from IC card 3 −45...............................

P14 PPGRD

F15 XCH 16-bit data exchange 3 −49....................................

P15 PXCH

F16 DXCH 32-bit data exchange 3 −51....................................

P16 PDXCH

F17 SWAP Higher/ lower byte in 16-bit data exchange 3 −53.................

P17 PSWAP

F18 BXCH 16−bit blocked data exchange 3 −55............................

P18 PBXCH

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