FIC 486-JAL User manual

486- JAL

MAIN BOARD

USER’S MANUAL

DOC. NO.

12409

Rev.

Date

MAY

1993

Table of Contents

INTRODUCTION l l l l l l l l l l l l l 1

OVERVIEW ........................

SPECIFICATIONS .....................

MOTHERBOARD LAYOUT ................

SYSTEM BLOCK DIAGRAM. ...............

INSTALLATION l l l l l l l l l l l l l l 5

CONNECTOR DESCRIPTION ...............

JUMPER DESCRIPTION ..................

INT/EXT BATTERY SELECTION (FOR

DS12885Q

ONLY) . . 11

CPU TYPE SELECTION ..................

ON-BOARD VGA CONTROLLER .............

FDD TYPE SELECTION ..................

LOCAL IDE SELECTION .................

HDD SPEED SELECTION (PDC 20230 ONLY) ........

CPU SPEED SELECTION (PDC 20230 ONLY) ........

CPU CLOCK SELECTION .................

SYSTEM MEMORY l l l l l l l l l l l l 15

MEMORY CONFIGURATION . . . . . . . . . . . . . . . 15

Appendix A

AWARDBIOS SETUP l l l l l l l l l l l 17

SYSTEM SETUP CONFIGURATION ............

STATUS PAGE SETUP ..................

OPTIONS PAGE SETUP ..................

SAVE AND EXIT .....................

Appendix B

AMIBIOSSETUP

l l 19

SYSTEM SETUP CONFIGURATION ............

STANDARD

CMOSSETUP

.................

ADVANCED CMOS SETUP ................

WRITE TO CMOSANDEXIT ...............

Appendix C

TECHNICALINFORMATION l

SYSTEM I/O ADDRESSMAP ................

HARDWARE INTERRUPT REQUESTS ..........

DMA ASSIGNMENTS ...................

MEMORY MAP ......................

ii-

486JAL

m.................

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INTRODUCTION

OVERVIEW

The

486.JAL

Motherboard

The 486-JAL is a high-performance VESA mother board, offering

outstanding features and speed ideal for building advanced personal

computers or workstations. The board utilizes high grade components

as listed below:

SPECIFICATIONS

Features of this board include:

Intel

80486DX/80486DX2/80486SX/80487SX

microprocessor.

Dual CPU in PQFP and PGA packages.

VIA

VT82C470

PC/AT chipset.

Supports

1MB

up to 32MB of DRAM memory;

Provides page mode DRAM operation.

Shadow RAM.

128KB

BIOS.

One

16-bit,

120-pin

ISA expansion slot.

CPU clock output frequency selectable by jumpers.

Cirrus GD5426 Local Bus VGA controller.

Promise PCD20230 Local Bus IDE controller (optional).

Real time clock/calendar.

Built-m IDE

HDD/FDD

and Local Bus IDE interface.

Two serial ports and one parallel port.

PS/2 mouse and PS/2 keyboard connector.

Local Bus VGA with 512K/lMB

/2MB

Video RAM on board.

LPM-size board ( 13.0” x 7.8”)

486JA L

INTRODUCTION

MOTHERBOARD LAYOUT

BANK

JCl

JC2

JC3

--Id

N-

FDD

HDD

l--J

J45

p---l

J24

J17

J16

J18

KEYLOCK

SPKR

RESET

486JAL

A4otherboard

Layout

486JA L

INTRODUCTION

SYSTEM BLOCK DIAGRAM

MEMORY

ADDRESS

BUS

,I,

SWEM

CPU ADDRESS

PDC

_lGD5426J=

System Block Diagram

serialport

parallel p

art

INSTALLATION

CONNECTOR DESCRIPTION

Connector

CNl-

PS/2 Keyboard

CN2

PSI2

Mouse

CN3

Serial port 1

CN4

Serial port2

Pin out

Signal Name

Keyboard data

GND

vcc

Keyboard clock

Mouse data

GND

vcc

Mouse clock

GND

Data carrier detect

Receive data

Transmit data

Data transmit ready

GND

Ready to receive data

Request to send data

Clear to send

Ring indicator

Data carrier detect

Receive data

Transmit data

Data transmit ready

GND

Ready to receive data

Request to send data

Clear to send

Ring indicator

486JA L

INSTALLATION

Connector

CN5

Parallel port

CN6

VGA connector

CN7

Power connector

Pin out

18-25

-_____

5-8

11-12

-3

5-8

10-12

_______

______--

Signal Name

-______

LPT strobe

LPT DO

LPTDl

LPT D2

LPT D3

LPT

104

LPT

LPT D6

LPT D7

LPT acknowledge

LPT busy

Paper end

Selected status

Auto line feed

LPT error

Initiate printer

Select printer

GND

Red

Green

Blue

GND

Horizontal sync

Vertical sync

Power good

+ 12v

-12v

GND

-5v

+ 5v

______-____---

__p

INSTALLATION

Connector Pin out Signal Name

513

14A

connector

VP0

GND

VP1

GND

VP2

GND

VP3

Enable video data

VP4

Enable sync signal

VP5

Enable video dot clock

VP6

VP7

GND

Video dot clock

GND

Banking

GND

Horizontal sync

GND

Vertical sync

GND

INSTALLATION

Connector

FDD

FDD connector

Pin out

Signal Name

1,3,5,7,

11,

13,

15,

17,

19,21,

23,25,

27,29,

31,33

Density selection

Index detection

Select motor A

Select drive B

Select drive A

Select motor B

Direction control

Step pulse

Write data

Write enable

Track

Write protect

Read data

Head select

Disk change

GND

486-JA

Table of contents

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