NXP Semiconductors HCS12 User manual

HCS12

Microcontrollers

freescale.com

USB2.0 to ATA/ATAPI Bridge

Designer Reference Manual

DRM062

Rev. 0

1/2005

USB2.0 to ATA/ATAPI Bridge Designer Reference Manual, Rev. 0

Freescale Semiconductor 3

Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.

This product incorporates SuperFlash® technology licensed from SST.

USB2.0 to ATA/ATATPI Bridge

Designer Reference Manual

by: Dennis Lui and Derek Lau

Applications Engineering

Microcontroller Division

Hong Kong

To provide the most up-to-date information, the revision of our documents on the World Wide Web will be

the most current. Your printed copy may be an earlier revision. To verify you have the latest information

available, refer to:

http://www.freescale.com

Revision History

USB2.0 to ATA/ATAPI Bridge Designer Reference Manual, Rev. 0

4Freescale Semiconductor

The following revision history table summarizes changes contained in this document. For your

convenience, the page number designators have been linked to the appropriate location.

Revision History

Date Revision

Level Description Page

Number(s)

Jan 2005 0 Initial release N/A

USB2.0 to ATA/ATAPI Bridge Designer Reference Manual, Rev. 0

Freescale Semiconductor 5

Table of Contents

Chapter 1

System Overview

1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.2 System Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.3 MC9S12UF32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.4 System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Chapter 2

Hardware Overview

2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.2 Hardware Functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.3 Voltage Regulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.4 Background Debug Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.5 USB Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.6 ATA Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Chapter 3

Software Overview

3.1 System Software Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.1.1 Main Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.1.2 Timer Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.1.3 USB Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Chapter 4

USB Module

4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4.2 Endpoints Configurations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Chapter 5

IQUEUE Module

5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.2 IQUEUE Request Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Chapter 6

ATA Module

6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

6.2 ATA Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

6.2.1 Write to ATA Device Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

6.2.2 Read from ATA Device Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Table of Contents

USB2.0 to ATA/ATAPI Bridge Designer Reference Manual, Rev. 0

6Freescale Semiconductor

Chapter 7

USB Mass Storage Interface Driver

7.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

7.2 USB Mass Storage Class Bulk-Only Transport . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

7.2.1 USB Command Block Wrapper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

7.2.2 USB Command Status Wrapper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

7.2.3 SCSI Command Descriptor Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

7.2.4 Example of Command Block Wrapper. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

7.3 Driver Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

7.3.1 Handling of USB Command Block Wrapper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

7.3.1.1 Commands Without Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

7.3.1.2 Host Sends out Data to Storage Device. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

7.3.1.3 Host Receives Data from Storage Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

7.3.2 Class Specific Request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Chapter 8

ATA/ATAPI Driver

8.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

8.2 ATA and ATAPI Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

8.3 Software Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

8.3.1 Commands Without Data Transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

8.3.2 Host Sends out Data to ATA/ATAPI Device. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

8.3.3 Host Receives Data from ATA/ATAPI Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

8.3.4 Individual Software Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Chapter 9

Test and Customization

9.1 Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

9.2 Customization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

9.2.1 Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

9.2.1.1 Self-powered . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

9.2.1.2 Bus-powered . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

9.2.1.3 Amadeus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

9.2.2 Firmware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

USB2.0 to ATA/ATAPI Bridge Designer Reference Manual, Rev. 0

Freescale Semiconductor 7

Chapter 1

System Overview

1.1 Introduction

This manual describes a reference design of a Universal Serial Bus (USB) 2.0 to ATA/ATAPI Bridge

solution by using the MC9S12UF32 microcontroller.

Since the MC9S12UF32 is a highly integrated USB 2.0 high speed device for mass storage applications,

the system consists of the MC9S12UF32 and passive components only. All hardware schematic

diagrams and most firmware source codes are available as reference materials.

1.2 System Features

• USB 2.0 High Speed and Full Speed compliance

• Windows 98 SE, Windows 2000, and Windows XP Compatible

• Supports ATA/ATAPI devices higher than 137G bytes capacity

• Supports PIO mode 0 to 4

• Supports UMDA mode 0 to 4

• Maximum 60M bytes per second burst transfer rate

• In-circuit evaluation and programming

1.3 MC9S12UF32

The MC9S12UF32 microcontroller (hereafter referred as UF32) features an integrated Universal Serial

Bus (USB) 2.0 controller and physical layer transceivers to provide comprehensive USB specification

implementation for both high-speed (480 Mbps) and full-speed (12 Mbps) operations. The high-speed

operation, running at bus speeds of 30 MHz, implements fast large data transfers for applications such

as real-time movies that were impractical at the previous lower-speed operation.

Besides standard USB functionality, the UF32 enables control of external harddisk drives, CD-ROM and

DVD-ROM drives. The UF32 also enables controls of different common Flash memory devices such as

CompactFlash, Secure Digital, MultiMediaCards, SmartMedia, and Memory Stick memory cards.

The availability of up to 75 programmable I/O lines helps to minimize the system costs and enhance

flexibility.

The UF32 is designed to reduce overall system components count and improves performance by

off-loading peripheral overhead functions from the CPU. The on-board Flash enables the peripheral

system to accommodate future software changes. The UF32 can be used in card readers for popular

Flash memory cards, ATA/ATAPI bridges for external hard disks and DVD ROM, USB Flash disks and

digital wallets.

There are 100 pins and 64 pins options for the UF32. The 100 pin device is designed for card reader and

digital wallet applications while the 64 pin device is designed for ATA/ATAPI bridge with SD or USB Flash

disk with SD and MS, and other USB applications that do not require so many I/O pins.

System Overview

USB2.0 to ATA/ATAPI Bridge Designer Reference Manual, Rev. 0

8Freescale Semiconductor

MC9S12UF32 features:

• HCS12 CPU core

• 32K bytes Flash, 3.5K bytes RAM, 1.5K bytes Queue-RAM

• Universal Serial Bus 2.0 controller and transceivers

• Integrated Queue controller

• ATA/ATAPI controller

• CompactFlash controller

• Secure Digit and MultiMediaCards controller

• SmartMedia and NAND Flash controller

• Memory Stick controller

• 8-channel, 16-bit timer

• Serial communications interface

1.4 System Overview

Figure 1-1. Block Diagram of USB2.0 to ATA/ATAPI Bridge

Since UF32 is a highly integrated USB 2.0 high speed device with embedded ATA controller, the system

consists of the UF32 and passive components only.

Standard ATA (IDE) Interface

USB SIE 9S12UF32

ATA/ATAPI Device

(Harddisk, CDR, CDRW, DVDR, DVDRW...)

To PC System

USB2.0 to ATA/ATAPI Bridge Designer Reference Manual, Rev. 0

Freescale Semiconductor 9

Chapter 2

Hardware Overview

2.1 Introduction

The system consists of the 64 pin package UF32 and passive components only. The major external

component is an MOSFET used for 5V to 3.3V voltage regulation. There are two reference demo boards

available: one is USB bus powered for 2.5" hard disk use, another is self-powered for 3.5" hard disk and

ATAPI devices use.

Figure 2-1. USB Bus Powered Demo Board

Figure 2-2. Self-Powered Demo Board

Hardware Overview

USB2.0 to ATA/ATAPI Bridge Designer Reference Manual, Rev. 0

10 Freescale Semiconductor

2.2 Hardware Functions

Figure 2-3. Hardware Functions

The hardware functions can be divided into the following parts:

• Voltage regulation

• Background debug interface

• USB interface

• ATA interface

2.3 Voltage Regulation

The UF32 is designed for a single 5V voltage input. There are three kinds of I/Os:

• Port E of 5V I/Os

• Port J, M, and Q of 5V or 3.3V I/O powered by VDD3X

• Port A, B, S, T, and U of 5V or 3.3V I/O powered by VDDX

However, for UF32 to be used in ATA applications VDD3X and VDDX must be with 3.3V, hence, only the

port E is with 5V I/Os while the others are with 3.3V I/Os.

The UF32 has four built-in voltage regulators:

• 3.3V regulator for USB transceiver and PLL use

• 3.3V regulator (with a required external MOSFET) for I/O use

• 2.5V regulator for S12 CPU core use

• 2.5V regulator for USB transceiver use

The UF32 needs 5V power supplied to VDDR. The external MOSFET is regulated by the UF32 to provide

3.3V supply to VDD3X and VDDX. The USB transceivers and PLL are powered by the internal 3.3V

regulator and the S12 CPU core is powered by the internal 2.5V regulator.

PORTE

PORTM

PORTJ

PORTQ

PORTT

PORTU

PORTS

PORTB

PORTA

BDM

USB

ATA

CORE

USB

REG

5V 3V

2.5V

5V / 3.3V

VDDA

VDDR

REF3V

VDD3X

VDDX

VDD Core

BKGD

USB Power

CS0–1, IOWR

DA0–2, IORD, DMACK

RESET

IORDY

DMARQ, INTRQ

D0–D7

D8–D15

MC9S12UF32

2.5V

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