Linear Technology DC1624A Quick setup guide

dc1624af

DEMO MANUAL DC1624A

Description

LTC4225-1/LTC4225-2

Dual Ideal Diode and

Hot Swap Controller

Demonstration circuit 1624A contains two independentrail

circuits each with Hot Swap™ and ideal diode functionality

provided by the LTC4225-1/LTC4225-2 dual ideal diode

and Hot Swap controller.

DC1624A facilitates evaluation of LTC4225 performance in

different operation modes such as supply ramp-up, power

supply switchover, steady state, and overcurrent faults.

Power supply switchover mode can be realized as either

an ideal diode functionality or as a prioritizer functionality.

Each DC1624A rail circuit is assembled to operate with a

12V supply and 11.5A maximum current load.

The main components of the board are the LTC4225

controller, two MOSFETs operating as ideal diodes, two

MOSFETs operating as Hot Swap devices, two power sense

resistors, two jumpers for independently enabling each

perForMAnce sUMMArY

rail, four LEDs to indicate power good and fault conditions

separately for each channel, and input voltage snubbers.

There are pads for optional RC circuits for each Hot Swap

MOSFET gate in order to adjust output voltage slew rate.

The standard configuration (as DC1624A populated by

default) places the ideal diode MOSFET ahead of the

Hot Swap MOSFET. The board also has pads for an alter-

native configuration with the Hot Swap MOSFET located

ahead of the ideal diode MOSFET.

Design files for this circuit board are available at

http://www.linear.com/demo

(TA= 25°C)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VIN Input Supply Range 2.9 18 V

VINTVCC(UVL) Internal VCC Undervoltage Lockout INTVCC Rising 2.1 2.2 2.3 V

VINTVCC(HYST) Internal VCC Undervoltage Lockout

Hysteresis

30 60 90 mV

Ideal Diode Control

ΔVFWD(REG) Forward Regulation Voltage (VINN - VOUT)10 25 40 mV

ΔVDGATE External N-Channel Gate Drive

(VDGATEN - VINN)

ΔVFWD = 0.1V

IN < 7V

IN = 7V to 18V

ICPO(UP) CPONPull-Up Current CPO = IN = 2.9V

CPO = IN = 18V

–60

–50

–95

–85

–120

–110

µA

IDGATE(FPU) DGATENFast Pull-Up Current ΔVFWD =0.2V, ΔVDGATE = 0V, CPO = 17V –1.5 A

IDGATE(FPD) DGATENFast Pull-Down Current ΔVFWD = –0.2V, ΔVDGATE = 5V 1.5 A

Hot Swap Control

ΔVSENSE(CB) Circuit Breaker Trip Sense Voltage

(VINN - VISENSEN)

47.5 50 52.5 mV

ΔVSENSE(ACL) Active Current Limit Sense Voltage

(VINN - VISENSEN)

55 65 75 mV

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and

Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the

property of their respective owners.

Downloaded from Arrow.com.

dc1624af

DEMO MANUAL DC1624A

perForMAnce sUMMArY

qUick stArt proceDUre

The LTC4225 functions as an ideal diode with inrush cur-

rent limiting and overcurrent protection by controlling

two external back-to-back N-channel MOSFETs in a power

path. The LTC4225 has two ideal diode and two Hot Swap

controllers. Each ideal diode MOSFET is intended to oper-

ate with a defined Hot Swap MOSFET, because they are

tied by common on/off control, and ideal diode controller

sense voltage includes both MOSFETs and sense resistor

voltage drop. Therefore, LTC4225 provides independent

control for the two input supplies.

The LTC4225 gate drive amplifiers (DGATEN,) monitor

the voltage between the INNand OUTNpins and drive the

DGATENpins. The amplifier quickly pulls up the DGATE

pin, turning on the MOSFET (Q1 or Q3), for ideal diode

control when it senses a large forward voltage drop.

Pulling the ON pin high and EN pins low initiates a 100ms

debounce timing cycle. After 100ms,a 10µA current source

from the charge pump ramps up the HGATENpin. When

the Hot Swap MOSFET (Q2 or Q4) turns on, the inrush

current is limited to a set level set by an external sense

resistor placed between IN and SENSE pins.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

IHGATE(UP) External N-Channel Gate Pull-Up Current Gate Drive On, HGATE = 0V 7 10 13 µA

IHGATE(DN) External N-Channel Gate Pull-Down Current Gate Drive Off, OUT = 12V, HGATE = OUT + 5V 150 300 500 µA

IHGATE(FPD) External N-Channel Gate Fast Pull-Down

Current

Fast Turn-Off, OUT = 12V, HGATE = OUT + 5V 100 200 300 mA

Input/Output Pin

VON(TH) ONNOn Pin Threshold Voltage ON Rising 1.21 1.235 1.26 V

VON(RESET) ONNPin Fault Reset Threshold Voltage ON Falling 0.55 0.6 0.63 V

VEN(TH) ENNPin Threshold Voltage EN Rising 1.185 1.235 1.284 V

VTMR(TH) TMRNPin Threshold Voltage TMR Rising

TMR Falling

1.198

0.15

1.235

0.2

1.272

0.25

ITMR(UP) TMRNPin Pull-Up Current TMR = 1V, In Fault Mode 75 100 125 µA

ITMR(DN) TMRNPin Pull-Down Current TMR = 2V, No Faults 1.4 22.6 µA

ITMR(RATIO) TMRNCurrent Ratio ITMR(DN)/ ITMR(UP) 1.4 22.7 %

(TA= 25°C)

An active current limit amplifier servos the gate of the

MOSFET to 65mV across the current sense resistor. In-

rush current can be further reduced, if desired, by adding

a capacitor from HGATE to GND. When the MOSFET’s

gate overdrive (HGATE to OUT voltage) exceeds 4.2V, the

PWRGD pin pulls low.

When both MOSFETs (Q1 and Q2 or Q3 and Q4) are turned

on, the gate drive amplifier controls DGATE to servo the

forward voltage drop (VIN -

VOUT) across the sense resistor

and the back-to-back MOSFETs to 25mV. If the load current

causes more than 25mV of voltage drop, the gate voltage

rises to enhance the MOSFET used for ideal diode control.

For large output currents the MOSFET’s gate is driven

fully on and the voltage drop is equal to the sum of the

ILOAD • RDS(ON) of the two MOSFETs in series.

In the case of an input supply short circuit when the

MOSFETs are conducting, a large reverse current starts

flowing from the load towards the input. The gate drive

amplifier detects this failure condition as soon as it ap-

pears and turns off the ideal diode MOSFET by pulling

down the DGATE pin.

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dc1624af

DEMO MANUAL DC1624A

qUick stArt proceDUre

Demonstration circuit DC1624A can be easily to set up to

evaluate the performance of the LTC4225-1/LTC4225-2.

Refer to the Figure 1 for proper measurement equipment

setup and follow the procedure below.

The DC1624A test includes independent tests of the

LTC4225 Hot Swap functionality, ideal diode functional-

ity and two power rails prioritizer functionality with the

channel 1 highest priority.

HOT SWAP FUNCTIONALITY TEST

This test is identical for each 12V rail and is performed

in the three steps by the measuring of the transient’s

parameters in the different operation modes.

The first step is a power-up without any additional load.

The second step is the current limit operation after suc-

cessful power-up transient. The third step is a power-up

with a shorted output.

Initially install the jumper heads in the following positions:

ON1_SEL and ON2_SEL in position OFF;

EN1_SEL and EN2_SEL in position LOW.

First Step

Connect a 12V power supply to the board input turrets

IN1 (IN2) and GND. Do not load the output. Place current

probe on the 12V supply and voltage probes on the OUT1

(OUT2) turret.

Provide ON1 (ON2) signal at the ON1 (ON2) pin by mov-

ing the ON1_SEL (ON2_SEL) jumper header from OFF

position to the ON position. Observe the transient. The

output voltage rise time should be in the range of 12ms

to 29ms. PWRGD1 (PWRGD2) green LED should be lit.

Turn off the rail using the ON1_SEL (ON2_SEL) jumper.

Second Step

Initially adjust an electronic resistive load to 10Ω to 12Ω

and connect it to the OUT1 (OUT2) turret and GND. Turn

on the rail and slowly increase load current up to the circuit

breaker threshold level. The current limit range should be

from 11.5A to 13.3A. Turn off the rail using the ON1_SEL

(ON2_SEL) jumper.

Third Step

Short the output to ground with a wire. Place the current

probe on this wire. Turn on the rail and record the current

shape. The maximum current should be in the (13.6A to

18.9A) range. The LTC4225-1 latches off after overcurrent

condition, but the LTC4225-2 automatically retries after

200ms to 450ms.

IDEAL DIODE FUNCTIONALITY TEST

Use an individual 12V power supply for each rail; connect

the two outputs together at a common load. Adjust each

input voltage to 12V with maximum possible accuracy.

In this test, both rails are active and small variations in

the input voltage will force one channel off and the other

channel on.

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dc1624af

DEMO MANUAL DC1624A

qUick stArt proceDUre

Place a voltmeter between IN1 and IN2 turrets to measure

the difference between two input voltages. Activate both

rails and keep a load around 1A to 3A. Adjust with the input

voltage levels and verify that when the difference between

input voltages exceeds 40mV only one rail is active.

THE PRIORITIZER FUNCTIONALITY TEST

The DC1624A is assembled with components to imple-

ment a two power rails prioritizer with channel 1 having

the higher priority.

Install R17 with 470 and R18 with 41.2k.

Place JP5 PPR_SEL (power priority select) jumper in posi-

tion ON2 and JP4 ON2_SEL (ON2 select) in position OFF.

Apply independent supply voltages (12V) to both inputs.

Channel 1 will be connected to load. Reduce channel 1

input voltage until it reaches an undervoltage condition

and D5 (PWRGD2) lights. At the same time channel 2

power supply will deliver power to the load.

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dc1624af

DEMO MANUAL DC1624A

Figure 1. Measurement Equipment Setup for Hot Swap Functionality Test

SW1

DC1624A F01

POWER

SUPPLY 1

POWER

SUPPLY 2

CL1

RL1

SW2

SW3

CL2

RL2

SW4

qUick stArt proceDUre

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dc1624af

DEMO MANUAL DC1624A

pArts list

ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

Required Circuit Components

1 7 C1, C2, C3, C8, C9, C11, C14 CAP, X7R, 0.1µF, 50V, 0603 AVX, 06035C104KAT

2 2 C4, C5 CAP, X7R, 47nF, 50V, 0603 AVX, 06035C473KAT

3 2 C6, C7 CAP, X7R, 15nF, 50V, 0603 AVX, 06035C153KAT

4 0 C10, C13 OPT

5 2 C12, C15 CAP, AL, El, S/M 100µF, 50V SANYO, 50CE100BS

6 2 D1, D2 DIODE, VOLTAGE SUPP 13V 5% SMA VISHAY, SMAJ17A-E3

7 2 D3, D5 LED, SMT GREEN PANASONIC, LN1351C

8 2 D4, D6 LED, SMT RED PANASONIC, LN1251CTR

9 0 D7, D8, D10, D11 OPT

10 1D9 DIODE, SWITCHING, SOD80 VISHAY, LS4148

11 8E10 to E16, E18 TURRET, TESTPOINT, 2308 MILL-MAX, 2308-2-00-80-00-00-07-0

12 10 E1 to E9, E17 TURRET, TESTPOINT, 2501 MILL-MAX, 2501-2-00-80-00-00-07-0

13 8 J1 to J8 JACK BANANA KEYSTONE, 575-4

14 5JP1, JP2, JP3, JP4, JP5 HEADERS, 3 PINS 2mm CTRS SAMTEC TMM-103-02-L-S

15 5 XJP1, XJP2, XJP3, XJP4,

XJP5

SHUNT, 2mm CTRS SAMTEC 2SN-BK-G

16 4 Q1, Q2, Q3, Q4, N-CHANNEL 30-V MOSFET, PPSO-8 VISHAY, Si7336ADP

17 0 Q5, Q6, Q7, Q8 OPT

18 2 RS1, RS2 RES, CHIP, 0.004, 1/2W, 1%, 2010 VISHAY, WSL20104L000FEA

19 0RS3, RS4 OPT

20 4R1, R3, R13, R14 RES, CHIP, 10, 1%, 0603 VISHAY, CRCW060310R0FKEA

21 2 R2, R4 RES, CHIP, 47, 1%, 0603 VISHAY, CRCW060347R0FKEA

22 4 R5, R6, R7, R8 RES, CHIP, 3k, 1%, 0805 VISHAY, CRCW08053K00FKEA

23 2R9, R11 RES, CHIP, 20k, 1%, 0603 VISHAY, CRCW0060320K0FKEA

24 2R10, R12 RES, CHIP, 137k, 1%, 0603 VISHAY, CRCW0603137KFKEA

25 0R15, R16, R17, R18 OPT

26 4 MTGS AT 4 CORNERS STANDOFF, NYLON, 0.25, 1/4" KEYSTONE, 8832 (SNAP ON)

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dc1624af

DEMO MANUAL DC1624A

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

scheMAtic DiAgrAM

D D

C C

B B

A A

EXT

LTC4225CUFD-1

ASSY

-A

-B

LTC4225CUFD-2

ON2

1. ALL RESISTORS ARE IN OHMS, 0603.

ALL CAPACITORS ARE IN MICROFARADS, 0603.

NOTE: UNLESS OTHERWISE SPECIFIED

OPT

OPT OPT

DG2

ON2

DG2HG2

DG1

HG1

HG2

HG1

IN2

IN1

OUT1

OUT2

IN2

INTVCC

REVISION HISTORY

DESCRIPTION DATEAPPROVEDECO REV

VLADIMIR O.

PRODUCTION311-09-10

REVISION HISTORY

DESCRIPTION DATEAPPROVEDECO REV

VLADIMIR O.

PRODUCTION311-09-10

REVISION HISTORY

DESCRIPTION DATEAPPROVEDECO REV

VLADIMIR O.

PRODUCTION311-09-10

SIZE

DATE:

IC NO. REV.

SHEET OF

TITLE:

APPROVALS

PCB DES.

APP ENG.

TECHNOLOGY Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

CUSTOMER NOTICE

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SCHEMATIC

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

SCALE = NONE

www.linear.com

Tuesday, December 07, 2010

DUAL IDEAL DIODE AND HOT SWAP CONTROLLER

VLADIMIR O.

N/A

LTC4225CUFD-1/-2

DEMO CIRCUIT 1624A

SIZE

DATE:

IC NO. REV.

SHEET OF

TITLE:

APPROVALS

PCB DES.

APP ENG.

TECHNOLOGY Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

CUSTOMER NOTICE

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SCHEMATIC

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

SCALE = NONE

www.linear.com

Tuesday, December 07, 2010

DUAL IDEAL DIODE AND HOT SWAP CONTROLLER

VLADIMIR O.

N/A

LTC4225CUFD-1/-2

DEMO CIRCUIT 1624A

SIZE

DATE:

IC NO. REV.

SHEET OF

TITLE:

APPROVALS

PCB DES.

APP ENG.

TECHNOLOGY Fax: (408)434-0507

Milpitas, CA 95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

CUSTOMER NOTICE

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO

VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND PRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND

SCHEMATIC

SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.

SCALE = NONE

www.linear.com

Tuesday, December 07, 2010

DUAL IDEAL DIODE AND HOT SWAP CONTROLLER

VLADIMIR O.

N/A

LTC4225CUFD-1/-2

DEMO CIRCUIT 1624A

RS3

0.004

0.5W

2010

RS3

0.004

0.5W

2010

15nF

50V

15nF

50V

R4 47R4 47

CMHZ4706

PROBE GND

Si7336ADP

0.1uF

50V

0.1uF

50V

Si7336ADP

GND

R14

JP5

OFF

PPR_SEL

JP5

OFF

PPR_SEL

OUT1

GREEN

JP4

ON2 ON2_SEL

OFF

JP4

ON2 ON2_SEL

OFF

0.1uF

50V

0.1uF

50V

JP2

LOW

EN2_SEL

JP2

LOW

EN2_SEL

IN1

2.9V TO 18V J5

IN1

2.9V TO 18V

JP1

LOW

EN1_SEL

JP1

LOW

EN1_SEL

Si7336ADP

5 1

E11

PWRGD2

E11

PWRGD2

IN1

Si7336ADP

47nF

16V

X7R

47nF

16V

X7R

R12

137K 1%

R12

137K 1%

0.1uF

50V

0.1uF

50V

E16

PWRGD1

E16

PWRGD1

LS4148

SMAJ17A

Si7336ADP

R16

OPT

R16

OPT

RED

1 2

0.1uF

50V

0.1uF

50V

RED

OUT1

11.5A

OUT1

11.5A

E18

ON1

E18

ON1

R17

OPT

R17

OPT

IN2

D11

CMHZ4706

D11

CMHZ4706

IN2

2.9V TO 18V

IN2

2.9V TO 18V

D10

CMHZ4706

D10

CMHZ4706

R15

OPT

R15

OPT

C13

100uF

50V

OPT

C13

100uF

50V

OPT

RS4

0.004

0.5W

RS4

0.004

0.5W

15nF

50V

15nF

50V

GREEN

1 2

C15

100uF

50V

C15

100uF

50V

E17

GND

E17

GND

R2 47R2 47

GND

J4 GND

0805

CMHZ4706

20K

E14 EN1

E12

FAULT2

E12

FAULT2

R10

137K 1%

R10

137K 1%

GND

E13

EN2

E13

EN2

E4 GND

47nF

16V

47nF

16V

C12

100uF

50V

C12

100uF

50V

C10

100uF

50V

OPT

C10

100uF

50V

OPT

SMAJ17A

RS1

0.004

0.5W

2010

RS1

0.004

0.5W

2010

GND

JP3

ON1

ON1_SEL

OFF

JP3

ON1

ON1_SEL

OFF

C14

0.1uF

50V

C14

0.1uF

50V

R18

OPT

R18

OPT

0.1uF 50V

Si7336ADP

5 1

OUT2

11.5A

OUT2

11.5A

GND

0805

GND

R13

0805

Si7336ADP

5 1

C11

0.1uF

50V

C11

0.1uF

50V

0805

E3 OUT2

E15

FAULT1

E15

FAULT1

R11

20K

R11

20K

RS2

0.004

0.5W

RS2

0.004

0.5W

E10

ON2

E10

ON2

Si7336ADP

5 1

U1U1

INTVCC

ON1

GND

ON2

CPO2

IN2

SENSE2

HGATE2

DGATE2

OUT2

TMR2 15

PWRGD2 12

FAULT2 13

EN2 14

FAULT1 19

PWRGD1 20

TMR1 16

OUT1 21

DGATE1 24

HGATE1 22

SENSE1 1

IN1 2

CPO1 23

EN1 17

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dc1624af

DEMO MANUAL DC1624A

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ●FAX: (408) 434-0507 ●www.linear.com

 LINEAR TECHNOLOGY CORPORATION 2011

LT 0611 • PRINTED IN USA

DEMONSTRATION BOARD IMPORTANT NOTICE

Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:

This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT

OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete

in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety

measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union

directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.

If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date

of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU

OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS

FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR

ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims

arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all

appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or

agency certified (FCC, UL, CE, etc.).

No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance,

customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.

LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.

Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and

observe good laboratory practice standards. Common sense is encouraged.

This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC applica-

tion engineer.

Mailing Address:

Linear Technology

1630 McCarthy Blvd.

Milpitas, CA 95035

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