Atmel SAM4SD32B Instruction Manual

Features

•Core

– ARM®Cortex®-M4 with a 2 Kbytes cache running at up to 120 MHz

– Memory Protection Unit (MPU)

– DSP Instruction Set

–Thumb

®-2 instruction set

•Pin-to-pin compatible with SAM3N, SAM3S products (64- and 100- pin versions) and

SAM7S legacy products (64-pin version)

•Memories

– Up to 2048 Kbytes embedded Flash with optional dual bank and cache memory

– Up to 160 Kbytes embedded SRAM

– 16 Kbytes ROM with embedded boot loader routines (UART, USB) and IAP routines

– 8-bit Static Memory Controller (SMC): SRAM, PSRAM, NOR and NAND Flash

support

•System

– Embedded voltage regulator for single supply operation

– Power-on-Reset (POR), Brown-out Detector (BOD) and Watchdog for safe operation

– Quartz or ceramic resonator oscillators: 3 to 20 MHz main power with Failure

Detection and optional low-power 32.768 kHz for RTC or device clock

– RTC with Gregorian and Persian Calendar mode, waveform generation in low-

power modes

– RTC clock calibration circuitry for 32.768 kHz crystal frequency compensation

– High precision 8/12 MHz factory trimmed internal RC oscillator with 4 MHz default

frequency for device startup. In-application trimming access for frequency

adjustment

– Slow Clock Internal RC oscillator as permanent low-power mode device clock

– Two PLLs up to 240 MHz for device clock and for USB

– Temperature Sensor

– Up to 22 Peripheral DMA (PDC) Channels

•Low Power Modes

– Sleep and Backup modes, down to 1 µA in Backup mode

– Ultra low-power RTC

•Peripherals

– USB 2.0 Device: 12 Mbps, 2668 byte FIFO, up to 8 bidirectional Endpoints. On-Chip

Transceiver

– Up to 2 USARTs with ISO7816, IrDA®, RS-485, SPI, Manchester and Modem Mode

– Two 2-wire UARTs

– Up to 2 Two Wire Interface (I2C compatible), 1 SPI, 1 Serial Synchronous Controller

(I2S), 1 High Speed Multimedia Card Interface (SDIO/SD Card/MMC)

– 2 Three-Channel 16-bit Timer/Counter with capture, waveform, compare and PWM

mode. Quadrature Decoder Logic and 2-bit Gray Up/Down Counter for Stepper Motor

– 4-channel 16-bit PWM with Complementary Output, Fault Input, 12-bit Dead Time

Generator Counter for Motor Control

– 32-bit Real-time Timer and RTC with calendar and alarm features

– Up to 16-channel, 1Msps ADC with differential input mode and programmable gain

stage and auto calibration

– One 2-channel 12-bit 1Msps DAC

– One Analog Comparator with flexible input selection, Selectable input hysteresis

– 32-bit Cyclic Redundancy Check Calculation Unit (CRCCU)

– Write Protected Registers

•I/O

– Up to 79 I/O lines with external interrupt capability (edge or level sensitivity),

debouncing, glitch filtering and on-die Series Resistor Termination

– Three 32-bit Parallel Input/Output Controllers, Peripheral DMA assisted Parallel

Capture Mode

•Packages

– 100-lead LQFP, 14 x 14 mm, pitch 0.5 mm/100-ball TFBGA, 9 x 9 mm, pitch

0.8 mm/100-ball VFBGA, 7 x 7 mm, pitch 0.65 mm

– 64-lead LQFP, 10 x 10 mm, pitch 0.5 mm/64-lead QFN 9x9 mm, pitch 0.5 mm

AT91SAM

ARM-based

Flash MCU

SAM4S Series

Preliminary

Datasheet

11100B–ATARM–31-Jul-12

211100B–ATARM–31-Jul-12

SAM4S Series [Preliminary]

1. Description The Atmel SAM4S series is a member of a family of Flash microcontrollers based on the high

performance 32-bit ARM Cortex-M4 RISC processor. It operates at a maximum speed of

120 MHz and features up to 2048 Kbytes of Flash, with optional dual bank implementation and

cache memory, and up to 160 Kbytes of SRAM. The peripheral set includes a Full Speed USB

Device port with embedded transceiver, a High Speed MCI for SDIO/SD/MMC, an External Bus

Interface featuring a Static Memory Controller providing connection to SRAM, PSRAM, NOR

Flash, LCD Module and NAND Flash, 2x USARTs, 2x UARTs, 2x TWIs, 3x SPI, an I2S, as well

as 1 PWM timer, 2x three channel general-purpose 16-bit timers (with stepper motor and

quadrature decoder logic support), an RTC, a 12-bit ADC, a 12-bit DAC and an analog

comparator.

The SAM4S series is ready for capacitive touch thanks to the QTouch®library, offering an easy

way to implement buttons, wheels and sliders.

The SAM4S device is a medium range general purpose microcontroller with the best ratio in

terms of reduced power consumption, processing power and peripheral set. This enables the

SAM4S to sustain a wide range of applications including consumer, industrial control, and PC

peripherals.

It operates from 1.62V to 3.6V.

The SAM4S series is pin-to-pin compatible with the SAM3N, SAM3S series (64- and 100-pin

versions) and SAM7S legacy series (64-pin versions).

11100B–ATARM–31-Jul-12

SAM4S Series [Preliminary]

1.1 Configuration Summary

The SAM4S series devices differ in memory size, package and features. Table 1-1 summarizes

the configurations of the device family.

Notes: 1. One channel is reserved for internal temperature sensor.

2. Full Modem support on USART1.

Table 1-1. Configuration Summary

Feature SAM4SD32C SAM4SD32B SAM4SD16C SAM4SD16B SAM4SA16C SAM4SA16B SAM4S16C SAM4S16B SAM4S8C SAM4S8B

Flash 2 x 1024

Kbytes 2 x 1024

Kbytes 2 x 512

Kbytes 1024 Kbytes 1024 Kbytes 1024 Kbytes 1024

Kbytes 512 Kbytes 512 Kbytes

SRAM 160 Kbytes 160 Kbytes 160 Kbytes 160 Kbytes 160 Kbytes 160 Kbytes 128 Kbytes 128 Kbytes 128 Kbytes 128 Kbytes

HCACHE 2KBytes 2KBytes 2KBytes 2KBytes 2KBytes 2KBytes - - - -

Package

LQFP 100

TFBGA 100

VFBGA 100

LQFP 64

QFN 64

LQFP 100

TFBGA 100

VFBGA 100

LQFP 64

QFN 64

LQFP 100

TFBGA 100

VFBGA 100

LQFP 64

QFN 64

LQFP 100

TFBGA 100

VFBGA 100

LQFP 64

QFN 64

LQFP 100

TFBGA 100

VFBGA 100 LQFP 64

QFN 64

Number of

PIOs 79 47 79 47 79 47 79 47 79 47

External

Bus

Interface

8-bit data,

4chip selects,

24-bit address -8-bit data,

4chip selects,

24-bitaddress -8-bit data,

4chip selects,

24-bitaddress -8-bit data,

4chip selects,

24-bitaddress -8-bit data,

4chip selects,

24-bitaddress -

12-bit ADC 16 ch.(1) 11 ch.(1) 16 ch.(1) 11 ch.(1) 16 ch.(1) 11 ch.(1) 16 ch.(1) 11 ch.(1) 16 ch.(1) 11 ch.(1)

12-bit DAC 2 ch. 2 ch. 2 ch. 2 ch. 2 ch. 2 ch. 2 ch. 2 ch. 2 ch. 2 ch.

Timer

Counter

Channels 6363636363

PDC

Channels 22 22 22 22 22 22 22 22 22 22

USART/

UART 2/2(2) 2/2(2) 2/2(2) 2/2(2) 2/2(2) 2/2(2) 2/2(2) 2/2(2) 2/2(2) 2/2(2)

HSMCI 1 port

4 bits 1 port

4 bits

411100B–ATARM–31-Jul-12

SAM4S Series [Preliminary]

2. Block Diagram

Figure 2-1. SAM4S16, S8 Series 100-pin version Block Diagram

PLLA

SystemController

WDT

RTT

Osc 32 kHz

SUPC

RSTC

8GPBREG

3-20 MHz

Osc

POR

RTC

RC 32 kHz

RC Osc

12/8/4 MHz

I/D S

MPU

4-layer AHB Bus Matrix Fmax 120 MHz

ADC Ch.

PLLB

PMC

PIOA / PIOB / PIOC

PIO

External Bus

Interface D[7:0]

PIODC[7:0]

A[0:23]

A21/NANDALE

A22/NANDCLE

NCS0

NCS1

NCS2

NCS3

NRD

NWE

NANDOE

NANDWE

NWAIT

High Speed MCI

DATRG PDC

PDC

DAC0

DAC1

Timer Counter B

Timer Counter A

TC[3..5]

TC[0..2]

TIOA[3:5]

TIOB[3:5]

TCLK[3:5]

AD[0..14]

RXD1

TXD1

USART1

USART0

UART1

UART0

SCK1

RTS1

CTS1

DSR1

DTR1

RI1

DCD1

NAND Flash

Logic

TWCK0

TWD0

TWD1

URXD0

UTXD0

URXD1

UTXD1

RXD0

TXD0

SCK0

RTS0

CTS0

TWCK1

ADVREF

TIOB[0:2]

TCLK[0:2]

PWMH[0:3]

PWML[0:3]

PWMFI0

ADTRG

TIOA[0:2]

TST

PCK0-PCK2

XIN

NRST

VDDCORE

XOUT

RTCOUT0

RTCOUT1

XIN32

XOUT32

ERASE

VDDPLL

VDDIO

12-bit DAC

Temp. Sensor

PWM

12-bit ADC

TWI0

TWI1

SPI

SSC

PIO

Static Memory

Controller

Analog

Comparator

CRC Unit

Peripheral

Bridge

2668

Bytes

FIFO

USB 2.0

Full

Speed

Transceiver

NPCS0

PIODCCLK

PIODCEN1

PIODCEN2

NPCS1

NPCS2

NPCS3

MISO

MOSI

SPCK

MCDA[0..3]

MCCDA

MCCK

DDP

DDM

ADVREF

ROM

16 Kbytes

FLASH

1024 Kbytes

512 Kbytes

Flash

Unique

Identifier

User

Signature

TDI

TDO

TMS/SWDIO

TCK/SWCLK

JTAGSEL

Voltage

Regulator

VDDIN

VDDOUT

Cortex-M4 Processor

Fmax 120 MHz

In-Circuit Emulator

JTAG & Serial Wire

24-Bit

SysTick Counter

DSP

SRAM

128Kbytes

11100B–ATARM–31-Jul-12

SAM4S Series [Preliminary]

Figure 2-2. SAM4S16, S8 Series 64-pin version Block Diagram

PLLA

SystemController

WDT

RTT

Osc 32 kHz

SUPC

RSTC

8GPBREG

3-20 MHz

Osc

POR

RTC

RC 32 kHz

RC Osc

12/8/4 MHz

I/D S

MPU

4-layer AHB Bus Matrix Fmax 120 MHz

ADC Ch.

PLLB

PMC

PIOA / PIOB

PIODC[7:0]

High Speed MCI

DATRG PDC

PDC

DAC0

DAC1

Timer Counter A

TC[0..2]

AD[0..9]

RXD1

TXD1

USART1

USART0

UART1

UART0

SCK1

RTS1

CTS1

DSR1

DTR1

RI1

DCD1

TWCK0

TWD0

TWD1

URXD0

UTXD0

URXD1

UTXD1

RXD0

TXD0

SCK0

RTS0

CTS0

TWCK1

ADVREF

TIOB[0:2]

TCLK[0:2]

PWMH[0:3]

PWML[0:3]

PWMFI0

ADTRG

TIOA[0:2]

TST

PCK0-PCK2

XIN

NRST

VDDCORE

XOUT

RTCOUT0

RTCOUT1

XIN32

XOUT32

ERASE

VDDPLL

VDDIO

12-bit DAC

Temp. Sensor

PWM

12-bit ADC

TWI0

TWI1

SPI

SSC

PIO

Analog

Comparator

CRC Unit

Peripheral

Bridge

2668

Bytes

FIFO

USB 2.0

Full

Speed

Transceiver

NPCS0

PIODCCLK

PIODCEN1

PIODCEN2

NPCS1

NPCS2

NPCS3

MISO

MOSI

SPCK

MCDA[0..3]

MCCDA

MCCK

DDP

DDM

ADVREF

TDI

TDO

TMS/SWDIO

TCK/SWCLK

JTAGSEL

Voltage

Regulator

VDDIN

VDDOUT

Cortex-M4 Processor

Fmax 120 MHz

In-Circuit Emulator

JTAG & Serial Wire

24-Bit

SysTick Counter

PIO

DSP

ROM

16 Kbytes

FLASH

1024 Kbytes

512 Kbytes

Flash

Unique

Identifier

User

Signature

SRAM

128Kbytes

611100B–ATARM–31-Jul-12

SAM4S Series [Preliminary]

Figure 2-3. SAM4SD32, SD16, SA16 100-pin version Block Diagram

PLLA

TST

PCK0-PCK2

XIN

NRST

VDDCORE

XOUT

WDT

RTT

OSC 32k

XIN32

XOUT32

SUPC

RSTC

8GPBREG

3-20 MHz

Osc.

POR

RTC

RC 32k

12/8/4 M

ERASE

TDI

TDO

TMS/SWDIO

TCK/SWCLK

JTAGSEL

Voltage

Regulator

VDDIN

VDDOUT

SPI

TC[0..2]

DAC

ADVREF PDC

NPCS0

PIODCCLK

PIODCEN1

PIODCEN2

NPCS1

NPCS2

NPCS3

MISO

MOSI

SPCK

MCDA[0..3]

MCCDA

MCCK

TCLK[0:2]

Temp. Sensor

PDC

TWI0 PDC

TWD0

PWM

PDC

DDP

DDM

MPU

24-Bit

SysTick Counter

4-layer AHB Bus Matrix Fmax 120 MHz

TWI1 PDC

TWCK1

TWD1

PWMH[0:3]

PWML[0:3]

PWMFI0

PDC

UART0

UART1

URXD0

UTXD0

URXD1

UTXD1

SSC

Peripheral

Bridge

PDC

PIO

PDC

2668

Bytes

FIFO

USB 2.0

Full

Speed

VDDPLL

VDDIO

PDC

RXD0

TXD0 USART0

SCK0

RTS0

CTS0

Analog

Comparator

CRC Unit

ADC

Transceiver

PLLB

In-Circuit Emulator

JTAG & Serial Wire Flash

Unique

Identifier

PMC

PIOA / PIOB / PIOC

ADTRG

Cortex-M4 Processor

Fmax 120 MHz

Timer Counter A

Timer Counter B

TWCK0

FLASH

2*1024 KBytes

2*512 KBytes

1024 KBytes

SRAM

160 KBytesROM

16 KBytes

RTCOUT1

RTCOUT0

DSP

CMCC

(2 KB cache)

PIO

External Bus

Interface D[7:0]

PIODC[7:0]

A[0:23]

A21/NANDALE

A22/NANDCLE

NCS0

NCS1

NCS2

NCS3

NRD

NWE

NANDOE

NANDWE

NWAIT

High Speed MCI

PDC

DATRG PDC

DAC0

DAC1

TC[3..5]

TIOA[3:5]

TIOB[3:5]

TIOA[0:2]

TIOB[0:2]

TCLK[3:5]

AD[0..14]

PDC

RXD1

TXD1

USART1

SCK1

RTS1

CTS1

DSR1

DTR1

RI1

DCD1

NAND Flash

Logic

Static Memory

Controller

ADC

DAC

Temp Sensor

ADVREF

11100B–ATARM–31-Jul-12

SAM4S Series [Preliminary]

Figure 2-4. SAM4SD32, SD16, SA16 64-pin version Block Diagram

PLLA

SystemController

WDT

RTT

Osc 32 kHz

SUPC

RSTC

8GPBREG

3-20 MHz

Osc

POR

RTC

RC 32 kHz

RC Osc

12/8/4 MHz

MPU

4-layer AHB Bus Matrix Fmax 120 MHz

ADC Ch.

PLLB

PMC

PIOA / PIOB

PIODC[7:0

High Speed MCI

DATRG PDC

PDC

DAC0

DAC1

Timer Counter A

TC[0..2]

AD[0..9]

RXD1

TXD1

USART1

USART0

UART1

UART0

SCK1

RTS1

CTS1

DSR1

DTR1

RI1

DCD1

TWCK0

TWD0

TWD1

URXD0

UTXD0

URXD1

UTXD1

RXD0

TXD0

SCK0

RTS0

CTS0

TWCK1

ADVREF

TIOB[0:2]

TCLK[0:2]

PWMH[0:3]

PWML[0:3]

PWMFI0

ADTRG

TIOA[0:2]

TST

PCK0-PCK2

XIN

NRST

VDDCORE

XOUT

RTCOUT0

RTCOUT1

XIN32

XOUT32

ERASE

VDDPLL

VDDIO

12-bit DAC

Temp. Sensor

PWM

12-bit ADC

TWI0

TWI1

SPI

SSC

PIO

Analog

Comparator

CRC Unit

Peripheral

Bridge

2668

Bytes

FIFO

USB 2.0

Full

Speed

Transceiver

NPCS0

PIODCCLK

PIODCEN

PIODCEN2

NPCS1

NPCS2

NPCS3

MISO

MOSI

SPCK

MCDA[0..3

MCCDA

MCCK

DDP

DDM

ADVREF

Flash

Unique

Identifier

TDI

TDO

TMS/SWDIO

TCK/SWCLK

JTAGSEL

Voltage

Regulator

VDDIN

VDDOUT

Cortex-M4 Processor

Fmax 120 MHz

In-Circuit Emulator

JTAG & Serial Wire

24-Bit

SysTick Counter

PIO

DSP

ROM

16 KBytes

FLASH

2*1024 KBytes

2*512 KBytes

1024 KBytes

SRAM

160 KBytes

CMCC

(2 KB cache)

811100B–ATARM–31-Jul-12

SAM4S Series [Preliminary]

3. Signal Description

Table 3-1 gives details on signal names classified by peripheral.

Table 3-1. Signal Description List

Signal Name Function Type Active

Level Voltage

reference Comments

Power Supplies

VDDIO Peripherals I/O Lines and USB transceiver

Power Supply Power 1.62V to 3.6V

VDDIN Voltage Regulator Input, ADC, DAC and

Analog Comparator Power Supply Power 1.62V to 3.6V(4)

VDDOUT Voltage Regulator Output Power 1.2V Output

VDDPLL Oscillator and PLL Power Supply Power 1.08 V to 1.32V

VDDCORE Power the core, the embedded memories

and the peripherals Power 1.08V to 1.32V

GND Ground Ground

Clocks, Oscillators and PLLs

XIN Main Oscillator Input Input

VDDIO

Reset State:

- PIO Input

- Internal Pull-up disabled

- Schmitt Trigger enabled(1)

XOUT Main Oscillator Output Output

XIN32 Slow Clock Oscillator Input Input

XOUT32 Slow Clock Oscillator Output Output

PCK0 - PCK2 Programmable Clock Output Output

Reset State:

- PIO Input

- Internal Pull-up enabled

- Schmitt Trigger enabled(1)

Real Time Clock

RTCOUT0 Programmable RTC waveform output Output

VDDIO

Reset State:

- PIO Input

- Internal Pull-up enabled

- Schmitt Trigger enabled(1)

RTCOUT1 Programmable RTC waveform output Output

Serial Wire/JTAG Debug Port - SWJ-DP

TCK/SWCLK Test Clock/Serial Wire Clock Input

VDDIO

Reset State:

- SWJ-DP Mode

- Internal pull-up disabled(5)

- Schmitt Trigger enabled(1)

TDI Test Data In Input

TDO/TRACESWO Test Data Out / Trace Asynchronous Data

Out Output

TMS/SWDIO Test Mode Select /Serial Wire Input/Output Input / I/O

JTAGSEL JTAG Selection Input High Permanent Internal

pull-down

11100B–ATARM–31-Jul-12

SAM4S Series [Preliminary]

Flash Memory

ERASE Flash and NVM Configuration Bits Erase

Command Input High VDDIO

Reset State:

- Erase Input

- Internal pull-down enabled

- Schmitt Trigger enabled(1)

Reset/Test

NRST Synchronous Microcontroller Reset I/O Low VDDIO Permanent Internal

pull-up

TST Test Select Input Permanent Internal

pull-down

Universal Asynchronous Receiver Transceiver - UARTx

URXDx UART Receive Data Input

UTXDx UART Transmit Data Output

PIO Controller - PIOA - PIOB - PIOC

PA0 - PA31 Parallel IO Controller A I/O

VDDIO

Reset State:

- PIO or System IOs(2)

- Internal pull-up enabled

- Schmitt Trigger enabled(1)

PB0 - PB14 Parallel IO Controller B I/O

PC0 - PC31 Parallel IO Controller C I/O

PIO Controller - Parallel Capture Mode

PIODC0-PIODC7 Parallel Capture Mode Data Input

VDDIOPIODCCLK Parallel Capture Mode Clock Input

PIODCEN1-2 Parallel Capture Mode Enable Input

External Bus Interface

D0 - D7 Data Bus I/O

A0 - A23 Address Bus Output

NWAIT External Wait Signal Input Low

Static Memory Controller - SMC

NCS0 - NCS3 Chip Select Lines Output Low

NRD Read Signal Output Low

NWE Write Enable Output Low

NAND Flash Logic

NANDOE NAND Flash Output Enable Output Low

NANDWE NAND Flash Write Enable Output Low

High Speed Multimedia Card Interface - HSMCI

MCCK Multimedia Card Clock I/O

MCCDA Multimedia Card Slot A Command I/O

MCDA0 - MCDA3 Multimedia Card Slot A Data I/O

Table 3-1. Signal Description List (Continued)

Signal Name Function Type Active

Level Voltage

reference Comments

10 11100B–ATARM–31-Jul-12

SAM4S Series [Preliminary]

Universal Synchronous Asynchronous Receiver Transmitter USARTx

SCKx USARTx Serial Clock I/O

TXDx USARTx Transmit Data I/O

RXDx USARTx Receive Data Input

RTSx USARTx Request To Send Output

CTSx USARTx Clear To Send Input

DTR1 USART1 Data Terminal Ready I/O

DSR1 USART1 Data Set Ready Input

DCD1 USART1 Data Carrier Detect Output

RI1 USART1 Ring Indicator Input

Synchronous Serial Controller - SSC

TD SSC Transmit Data Output

RD SSC Receive Data Input

TK SSC Transmit Clock I/O

RK SSC Receive Clock I/O

TF SSC Transmit Frame Sync I/O

RF SSC Receive Frame Sync I/O

Timer/Counter - TC

TCLKx TC Channel x External Clock Input Input

TIOAx TC Channel x I/O Line A I/O

TIOBx TC Channel x I/O Line B I/O

Pulse Width Modulation Controller- PWMC

PWMHx PWM Waveform Output High for channel x Output

PWMLx PWM Waveform Output Low for channel x Output

only output in

complementary mode

when dead time insertion

is enabled.

PWMFI0 PWM Fault Input Input

Serial Peripheral Interface - SPI

MISO Master In Slave Out I/O

MOSI Master Out Slave In I/O

SPCK SPI Serial Clock I/O

SPI_NPCS0 SPI Peripheral Chip Select 0 I/O Low

SPI_NPCS1 -

SPI_NPCS3 SPI Peripheral Chip Select Output Low

Table 3-1. Signal Description List (Continued)

Signal Name Function Type Active

Level Voltage

reference Comments

This manual suits for next models

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