Allen-Bradley SLC 500 User manual

Addressing

Reference

Manual

SLC 500tFamily

of Programmable

Controllers

Allen-Bradley

Because of the variety of uses for the products described in this

publication, those responsible for the application and use of this control

equipment must satisfy themselves that all necessary steps have been taken

to assure that each application and use meets all performance and safety

requirements, including any applicable laws, regulations, codes and

standards.

The illustrations, charts, sample programs and layout examples shown in

this guide are intended solely for purposes of example. Since there are

many variables and requirements associated with any particular

installation, Allen-Bradley does not not assume responsibility or liability

(to include intellectual property liability) for actual use based upon the

examples shown in this publication.

Allen-Bradley publication SGI–1.1, Safety Guidelines for the Application,

Installation, and Maintenance of Solid-State Control (available from your

local Allen-Bradley office), describes some important differences between

solid-state equipment and electromechanical devices that should be taken

into consideration when applying products such as those described in this

publication.

Reproduction of the contents of this copyrighted publication, in whole or

in part, without written permission of Allen-Bradley company, Inc., is

prohibited.

Throughout this manual we use notes to make you aware of safety

considerations.

ATTENTION: Identifies information about practices or

circumstances that can lead to personal injury or death, property

damage or economic loss.

Attention statements help you to:

identify a hazard

avoid the hazard

recognize the consequences

Important: Identifies information that is critical for successful application

and understanding of the product.

Important User Information

Data Table Addressing for the SLC 500t

Family of Processors

This addressing reference helps you specify data table addresses in

SLC 500tfixed and modular programmable controllers. It contains

information for the following processors:

all SLC 500 Fixed Programmable Controllers

The following SLC 500 Modular Programmable Controllers

- SLC 5/01 CPU

- SLC 5/02 CPU

- SLC 5/03 CPU

Locating Addressing Information

For information about See page

memory maps 3

general format for direct logical ASCII addressing 4

logical addressing for I/O image elements 5

logical addressing for the status elements 7

logical addressing for integer elements 9

logical addressing for binary elements 11

logical addressing for floating-point elements 13

logical addressing for timer structures 14

logical addressing for counter structures 16

logical addressing for control block structures 18

Introduction

Addressing Reference

SLC 500 Family of Programmable Controllers

For specific information about the content of data table files, consult the:

PLCprogrammer, who assigns data to specific memory locations

SLC 500 Fixed Hardware Style Installation and Operation Manual,

publication 1747–NI001.

SLC 500 Modular Hardware Style Installation and Operation Manual,

publication 1747–NI002.

Advanced Programming Software (APS) User’s Manual,

publication 1747–NM002.

Important: Throughout this publication we use $as the logical address

identifier. This is an entry for INTERCHANGE software. It is also an entry

for 6200 programming software in sending a message from other stations

to a SLC 500 processing station. It is not used in 6200 programming

software for internal addressing.

Addressing Reference

SLC 500 Family of Programmable Controllers

Table A shows the logical arrangement of the data table for SLC 500

processors.

able

Data

able Memory Map

OUTPUT IMAGE

INPUT IMAGE

STATUS

BINARY

TIMER

COUNTER

CONTROL

INTEGER

FLOATING–POINT

$O:0

$O:30

$I:0

$I:30

$S:0

$S:n

$B3:0

$B3:255

$T4:0

$T4:255

$C5:0

$C5:255

$R6:0

$R6:255

$N7:0

$N7:255

$F8:0

$F8:255

$x10:0

$x255:255

NETWORK

USER DEFINED

File

Number File

Type Logical

Address Comments

$x9:0

$x9:255

See Note 1

See Note 2

See Note 3

See Note 4

thru

255

Notes

1 Address range is processor specific; see Logical Addressing for the Status Elements section.

2 Only the SLC 5/03 series B processor supports floating-point data type. Do not use this area for

processors that do not support floating-point data.

3 If non SLC 500 devices exist on the DH-485 link, use this area for network transfer. You can use

either binary (B) or integer (N) file types by specifying the appropriate letter for x. Otherwise, you can

use file 9 for user-defined files.

4 Use this area when you need more binary, timer, counter, control, integer, floating-point, or network

files that will fit in the reserved files. You can use binary (B), timer (T), counter (C), control (R), integer

(N), floating-point (F), or transfers (B and/or N) file types by specifying the appropriate letter for

. You

cannot use this area for output image, input image, and/or status files.

Memory

Map

Addressing Reference

SLC 500 Family of Programmable Controllers

Figure 1 illustrates the general format for logical addressing in the data

table.

Figure 1

General

Format for Logical Addressing

File Type

A = ASCII

B = Binary

C = Counter

D = Decimal (BCD)

F = Floating-point2

I = Input

N = Integer

O = Output

R = Control Block

S = Status

ST = ASCII String2

T = Timer

File Number

0 = Output

1 = Input

2 = Status

3 = Binary

4 = Timer

5 = Counter

6 = Control Block

7 = Integer

8 = Floating-point

10-255 = User-defined

Bit Number

0 – 15 decimal

Element or Structure Number

0 – 255 for all files except Status1

Logical Address Identifier

File Separator

Bit Separator (if addressing a bit)

$ B 123 : 123 / 15

Notes:

1The number of elements (words) in the status file is processor dependent;

see Logical Addressing for the Status Element section.

2ASCII string, floating-point, and network file types are not available on

SLC 500, SLC 5/01, SLC 5/02, SLC 5/03 processors.

You can address individual bits for the following elements in a data table

file by absolute bit number (0 thru 4095):

binary

control block

input image

integer

output image

status

General Format for Logical

ASCII Addressing

Addressing Reference

SLC 500 Family of Programmable Controllers

The file for output image elements is file 0 of the data table. This file

accommodates up to 256 output image elements.

The file for input image elements is file 1 of the data table. This file

accommodates up to 256 input image elements.

Each I/O image element consists of one 16-bit word. You can address an

I/O image element in its entirety of you can address any particular input or

output bit of an element individually.

Figure 2

Logical

Addressing for I/O Image Elements

File Type

O = Output

I = Input

I/O Slot Number

0 – 30 decimal

Bit Number**

0 – 15 decimal

Word Number**

0 – 255 decimal

Logical Address Identifier

File Separator

Bit Separator**

$ I : 12 . 1 / 12

Word Separator**

Required only when addressing to the bit level.

** Required only when addressing 24- and 32-bit I/O.

Figure 3

Bit

Map of I/O Image Element for 8-bit Discrete I/O

151413121110987654321 0

X = Not Used

XXXXXXXX7654321 0 I/O Bit Number

Figure 4

Bit

Map of I/O Image Element for 16-bit Discrete I/O

151413121110987654321 0

7654321 0 I/O Bit Number

14 13 12 11 10 9 815

Logical Addressing for the

Input/Output Image

Elements

Addressing Reference

SLC 500 Family of Programmable Controllers

Figure 5

Bit

Map of I/O Image Element for 24-bit Discrete I/O

151413121110987654321 0

7654321 0 I/O Bit Number

14 13 12 11 10 9 815

X X X X X X X X 23 22 21 20 19 18 17 16 I/O Bit Number

ord 0

ord 1

Figure 6

Bit

Map of I/O Image Element for 32-bit Discrete I/O

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

7654321 0 I/O Bit Number

14 13 12 11 10 9 815 23 22 21 20 19 18 17 16

30 29 28 27 26 25 2431 I/O Bit Number

ord 0

ord 1

able B

Parameters

of I/O Elements

Description PLC Data Type Valid Range

Input Element signed word –32,768 thru +32,767

Output Element signed word –32,768 thru +32,767

able C

Examples

for I/O Element 3 in Slot 5

To address the Use this form

Entire Input Element $I:5.3

Input Bit 6 $I:5.3/6

Entire Output Element $O:5.3

Output Bit 6 $O:5.3/6

Addressing Reference

SLC 500 Family of Programmable Controllers

The file for status elements is file 2 of the data table. The number of status

elements in this file (n) is processor dependent, see Figure 8.

Figure 7

Logical

Addressing for Status Elements

Bit Number*

0 – 15 decimal

Word Number

0 – n decimal

Logical Address Identifier

File Separator

Bit Separator*

$ S : 12 / 12

*Required

only when addressing to the bit level..

File Type

S = Status

For specific information about status elements, refer to the Advanced

Programming Software (APS) User’s Manual, publication 1747-NM002.

able D

Parameters

of Status W

ords

Description PLC Data Type Valid Range

Status Element signed word –32,768 thru +32,767

able E

Examples

for Status Element 3 in the Default File (File 2)

To address the Use this form

Entire Element $S:3 or $S2:3

Tenth Data Bit $S:3/9 or $S2:3/9

Logical Addressing for the

Status Elements

Addressing Reference

SLC 500 Family of Programmable Controllers

Figure 8

Status

file Memory Map for SLC Processors

Word Description Word Description

0Arithmetic and Scan Stat Flags 42 Time-of-Day Seconds

1Processor Mode, Status, and Control 43 Reserved

2Processor Alternate Mode, Status, and Control 44 Reserved

3Current and Watchdog Scan Timers 45 Reserved

4 Timebase 46 DII File Number

5Minor Error Bits 47 DII Input Slot

6Major Error Bits 48 DII Mask

7Suspend Code 49 DII Compare Value

8Suspend File 50 DII Down Count

9Network – Active Node Table word 0 51 DII Return Mask

10 Network – Active Node Table word 1 52 DII Accumulator

11 I/O Slot Enable/Disable Flags word 0 53 Reserved

12 I/O Slot Enable/Disable Flags word 1 54 Reserved

13 Math Register word 0 55 Last DII ISR Scan Time

14 Math Register word 1 56 Maximum DII ISR Scan Time

15 Node Address and Baud Rate 57 Processor Operating System Catalog Number

16 Test Single Step – Start at Rung Number 58 Processor Operating System System Series

17 Test Single Step – Start at File Number 59 Processor Operating System Release Number

18 Test Single Step – Stop Before Rung Number 60 Hardware Catalog Number

19 Test Single Step – Stop Before File Number 61 Hardware Series

20 Test Report – Fault/Powerdown Rung Number 62 Hardware Revision

21 Test Report – Fault/Powerdown File Number 63 User Program Type

22 Maximum Observed Scan Time 64 User Program Functional Index

23 Average Scan Time 65 User RAM Size

24 Index Register 66 Flash EEPROM Size

25 I/O Interrupt Pending word 0 67 Channel 0 Active Node Table word 0

26 I/O Interrupt Pending word 1 68 Channel 0 Active Node Table word 1

27 I/O Interrupt Enabled word 0 69 Channel 0 Active Node Table word 2

28 I/O Interrupt Enabled word 1 70 Channel 0 Active Node Table word 3

29 User Fault Routine File Number 71 Channel 0 Active Node Table word 4

30 STI (selectable timed interrupt) Time Interval 72 Channel 0 Active Node Table word 5

31 STI (selectable timed interrupt) File Number 73 Channel 0 Active Node Table word 6

32 I/O Interrupt Executing 74 Channel 0 Active Node Table word 7

33 Extended Processor Mode, Status, and Control 75 Channel 0 Active Node Table word 8

34 Reserved 76 Channel 0 Active Node Table word 9

35 Current Scan Time 1 msec 77 Channel 0 Active Node Table word 10

36 Extended Minor Error Bits 78 Channel 0 Active Node Table word 11

37 Calendar Year 79 Channel 0 Active Node Table word 12

38 Calendar Month 80 Channel 0 Active Node Table word 13

39 Calendar Day 81 Channel 0 Active Node Table word 14

40 Time-of-Day Hours 82 Channel 0 Active Node Table word 15

41 Time-of-Day Minutes

Not all processors support all status words. SLC 500 and SLC 5/01 processors only support words 0 – 15. SLC 5/02 processors only support words 0 – 32.

SLC 5/03 processors support words 0 – 82

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