Alinx ACU15EG User manual

ZYNQ UltraScale+ MPSoC

FPGA Core Board

ACU15EG

User Manual

ZYNQ Ultrascale + FPGA Board ACU15EG User Manual

2 / 30

www.alinx.com

Version Record

Version

Date

Release By

Description

Rev 1.1

2021-06-24

Rachel Zhou

First Release

ZYNQ Ultrascale + FPGA Board ACU15EG User Manual

3 / 30

www.alinx.com

Table of Contents

Version Record .............................................................................................2

ACU15EG Core Board .................................................................................4

Part 1: ACU15EG Core Board Introduction ..........................................4

Part 2: ZYNQ Chip ................................................................................ 5

Part 3: DDR4 DRAM ............................................................................. 7

Part 4: QSPI Flash .............................................................................. 14

Part 5: eMMC Flash ............................................................................ 16

Part 6: Clock configuration ..................................................................17

Part 7: Power Supply .......................................................................... 20

Part 8: ACU15EG Core Board Size Dimension ..................................22

Part 10: Board to Board Connectors pin assignment.........................22

ZYNQ Ultrascale + FPGA Board ACU15EG User Manual

4 / 30

www.alinx.com

ACU15EG Core Board

Part 1: ACU15EG Core Board Introduction

ACU15EG (core board model, the same below) FPGA core board, ZYNQ

chip is based on XCZU15EG-2FFVB1156I of XILINX company Zynq

UltraScale+ MPSoCs EG Family.

This core board uses 6 Micron DDR4 chips MT40A512M16GE, of which 4

DDR4 chips are mounted on the PS side to form a 64-bit data bus bandwidth

and 4GB capacity. 2 DDR4 chip is mounted on the PL end, which is a 32-bit

data bus width and a capacity of 2GB. The highest operating speed of DDR4

SDRAM on the PS side can reach 1200MHz (data rate 2400Mbps), and the

highest operating speed of DDR4 SDRAM on the PL side can reach 1200MHz

(data rate 2400Mbps). In addition, two 256MBit QSPI FLASH and an 8GB

eMMC FLASH chip are also integrated on the core board to start storage

configuration and system files.

In order to connect with the carrier board, the four board-to-board

connectors of this core board expand the PS side USB2.0 interface, Gigabit

Ethernet interface, SD card interface and other remaining MIO ports; also

expand 4 pairs of PS MGT high-speed transceiver interface; and 16 GTH

transceivers and almost all IO ports on the PL side (HP I/O: 96, HD I/O: 84).

The wiring between the XCZU15EG chip and the interface has been processed

with equal length and differential, and the core board size is only 3.15*2.36

(inch), which is very suitable for secondary development.

ZYNQ Ultrascale + FPGA Board ACU15EG User Manual

5 / 30

www.alinx.com

Figure 2-1-1: ACU15EG Core Board (Front View)

Part 2: ZYNQ Chip

The FPGA core board ACU15EG uses Xilinx's Zynq UltraScale+ MPSoCs

EG family chip, module XCZU15EG-2FFVB1156I. The PS system of the

ZU15EG chip integrates 4 ARM Cortex™-A53 processors with a speed of up to

1.3Ghz and supports Level 2 Cache; it also contains 2 Cortex-R5 processors

with a speed of up to 533Mhz

The ZU15EG chip supports 32-bit or 64-bit DDR4, LPDDR4, DDR3,

DDR3L, LPDDR3 memory chips, with rich high-speed interfaces on the PS

side such as PCIE Gen2, USB3.0, SATA 3.1, DisplayPort; it also supports

USB2.0, Gigabit Ethernet, SD/SDIO, I2C, CAN, UART, GPIO and other

interfaces. The PL end contains a wealth of programmable logic units, DSP and

internal RAM. .

ZYNQ Ultrascale + FPGA Board ACU15EG User Manual

6 / 30

www.alinx.com

Figure 2-2-1 detailed the Overall Block Diagram of the ZU15EG Chip.

Figure 2-2-1:

Overall Block Diagram of the

ZYNQ ZU15EG

Chip

The main parameters of the PS system part are as follows:

ARM quad-core Cortex ™-A53 processor, speed up to 1.3GHz, each

CPU 32KB level 1 instruction and data cache, 1MB level 2 cache,

shared by 2 CPUs

ARM dual-core Cortex-R5 processor, speed up to 533MHz, each CPU

32KB level 1 instruction and data cache, and 128K tightly coupled

memory.

External storage interface, support 32/64bit DDR4/3/3L, LPDDR4/3

interface

Static storage interface, support NAND, 2xQuad-SPI FLASH.

ZYNQ Ultrascale + FPGA Board ACU15EG User Manual

7 / 30

www.alinx.com

High-speed connection interface, support PCIe Gen2 x 4, 2 x USB3.0,

Sata 3.1, Display Port, 4 x Tri-mode, Gigabit Ethernet

Common connection interfaces: 2 x USB2.0, 2 x SD/SDIO, 2 x UART,

2 x CAN 2.0B, 2 x I2C, 2 x SPI, 4 x 32b GPIO

Power management: Support the four-part division of power supply

Full/Low/PL/Battery

Encryption algorithm: support RSA, AES and SHA.

System monitoring: 10-bit 1Mbps AD sampling for temperature and

voltage detection.

The main parameters of the PL logic part are as follows:

Logic Cells: 746K

CLB Flip-flops: 682K

Look-up-tables (LUTs): 341K



Block RAM

: 26.2Mb

Clock Management Units (CMTs): 4



DSP Slices: 3528

GTH 16.3Gb/s Transceiver: 24

XCZU15EV-2FFVB1156I chip speed grade is -2, industrial grade, package

is FFVB1156.

Part 3: DDR4 DRAM

The ACU15EG core board is equipped with 6 Micron (Micron) 1GB DDR4

chips, model MT40A512M16LY-062E, of which 4 DDR4 chips are mounted on

the PS side to form a 64-bit data bus bandwidth and 4GB capacity. Two DDR4

chip is mounted on the PL end, which is a 32-bit data bus width and a capacity

of 2GB. The maximum operating speed of the DDR4 SDRAM on the PS side

ZYNQ Ultrascale + FPGA Board ACU15EG User Manual

8 / 30

www.alinx.com

can reach 1200MHz (data rate 2400Mbps), and the 4 DDR4 storage systems

are directly connected to the memory interface of the PS BANK504. The

highest operating speed of the DDR4 SDRAM on the PL side can reach

1200MHz (data rate 2400Mbps), and two piece of DDR4 is connected to the

BANK64,65 interface of the FPGA. The specific configuration of DDR4 SDRAM

is shown in Table 2-3-1 below:

Bit Number

Chip Model

Capacity

Factory

U4,U5,U6,U7

MT40A512M16LY-062E

512M x 16bit

Micron

Table 2-3-1: DDR4 SDRAM Configuration

The hardware design of DDR4 requires strict consideration of signal

integrity. We have fully considered the matching resistor/terminal resistance,

trace impedance control, and trace length control in circuit design and PCB

design to ensure high-speed and stable operation of DDR4.

The hardware connection of DDR4 SDRAM on the PS Side is shown in

Figure 2-3-1:

Figure 2-3-1: DDR3 DRAM schematic diagram

The hardware connection of DDR4 SDRAM on the Pl Side is shown in

ZYNQ Ultrascale + FPGA Board ACU15EG User Manual

9 / 30

www.alinx.com

Figure 2-3-2:

Figure 2-3-2: DDR4 DRAM schematic diagram

PS Side DDR4 DRAM pin assignment:

Signal Name

Pin Name

Pin Number

PS_DDR4_DQS0_N

PS_DDR_DQS_N0_504

AN19

PS_DDR4_DQS0_P

PS_DDR_DQS_P0_504

AN18

PS_DDR4_DQS1_N

PS_DDR_DQS_N1_504

AN22

PS_DDR4_DQS1_P

PS_DDR_DQS_P1_504

AN21

PS_DDR4_DQS2_N

PS_DDR_DQS_N2_504

AJ19

PS_DDR4_DQS2_P

PS_DDR_DQS_P2_504

AH19

PS_DDR4_DQS3_N

PS_DDR_DQS_N3_504

AH23

PS_DDR4_DQS3_P

PS_DDR_DQS_P3_504

AH22

PS_DDR4_DQS4_N

PS_DDR_DQS_N4_504

AH29

PS_DDR4_DQS4_P

PS_DDR_DQS_P4_504

AH28

PS_DDR4_DQS5_N

PS_DDR_DQS_N5_504

AE29

PS_DDR4_DQS5_P

PS_DDR_DQS_P5_504

AE28

PS_DDR4_DQS6_N

PS_DDR_DQS_N6_504

AK32

PS_DDR4_DQS6_P

PS_DDR_DQS_P6_504

AJ32

PS_DDR4_DQS7_N

PS_DDR_DQS_N7_504

AE33

PS_DDR4_DQS7_P

PS_DDR_DQS_P7_504

AE32

ZYNQ Ultrascale + FPGA Board ACU15EG User Manual

10 / 30

www.alinx.com

PS_DDR4_DQ0

PS_DDR_DQ0_504

AP20

PS_DDR4_DQ1

PS_DDR_DQ1_504

AP18

PS_DDR4_DQ2

PS_DDR_DQ2_504

AP19

PS_DDR4_DQ3

PS_DDR_DQ3_504

AP17

PS_DDR4_DQ4

PS_DDR_DQ4_504

AM20

PS_DDR4_DQ5

PS_DDR_DQ5_504

AM19

PS_DDR4_DQ6

PS_DDR_DQ6_504

AM18

PS_DDR4_DQ7

PS_DDR_DQ7_504

AL18

PS_DDR4_DQ8

PS_DDR_DQ8_504

AP22

PS_DDR4_DQ9

PS_DDR_DQ9_504

AP21

PS_DDR4_DQ10

PS_DDR_DQ10_504

AP24

PS_DDR4_DQ11

PS_DDR_DQ11_504

AN23

PS_DDR4_DQ12

PS_DDR_DQ12_504

AL21

PS_DDR4_DQ13

PS_DDR_DQ13_504

AL22

PS_DDR4_DQ14

PS_DDR_DQ14_504

AM23

PS_DDR4_DQ15

PS_DDR_DQ15_504

AL23

PS_DDR4_DQ16

PS_DDR_DQ16_504

AL20

PS_DDR4_DQ17

PS_DDR_DQ17_504

AK20

PS_DDR4_DQ18

PS_DDR_DQ18_504

AJ20

PS_DDR4_DQ19

PS_DDR_DQ19_504

AK18

PS_DDR4_DQ20

PS_DDR_DQ20_504

AG20

PS_DDR4_DQ21

PS_DDR_DQ21_504

AH18

PS_DDR4_DQ22

PS_DDR_DQ22_504

AG19

PS_DDR4_DQ23

PS_DDR_DQ23_504

AG18

PS_DDR4_DQ24

PS_DDR_DQ24_504

AG21

PS_DDR4_DQ25

PS_DDR_DQ25_504

AH21

PS_DDR4_DQ26

PS_DDR_DQ26_504

AG24

PS_DDR4_DQ27

PS_DDR_DQ27_504

AG23

PS_DDR4_DQ28

PS_DDR_DQ28_504

AK22

PS_DDR4_DQ29

PS_DDR_DQ29_504

AJ21

PS_DDR4_DQ30

PS_DDR_DQ30_504

AJ22

PS_DDR4_DQ31

PS_DDR_DQ31_504

AK23

PS_DDR4_DQ32

PS_DDR_DQ32_504

AG31

PS_DDR4_DQ33

PS_DDR_DQ33_504

AG30

PS_DDR4_DQ34

PS_DDR_DQ34_504

AG29

PS_DDR4_DQ35

PS_DDR_DQ35_504

AG28

Table of contents

Other Alinx Motherboard manuals

Popular Motherboard manuals by other brands

DFI

DFI SD170 user manual

ASROCK

ASROCK ROMED8-2T user manual

Asus

Asus P2L97A user manual

Winmate

Winmate IC70 user manual

Asus

Asus MES-B user manual

Grantech

Grantech SYS8F377VGGA-3OMN user manual

Telit Wireless Solutions

Telit Wireless Solutions SL869-3DR user guide

Gigabyte

Gigabyte GA-9IVDT user manual

Texas Instruments

Texas Instruments ADS8372EVM user guide

Commell

Commell MS-C73 user manual

IBT Technologies

IBT Technologies MB860 user manual

Nvidia

Nvidia TEGRA DG-04927-001_V01 user guide

Biostar

Biostar M7VIT Bravo Description

Intel

Intel D33217CK specification

Asus

Asus F1A55-M LX PLUS R2.0 user manual

EPC

EPC EPC9147C quick start guide

Asus

Asus EX-B760M-V5 D4 quick start guide

EPOX

EPOX MU-8KHA0010 user manual