ADT ADZBT1HP Instructions for use
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ADZBT1HP Hardware User Manual
Hardware User Manual
Version 1.1
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ADZBT1HP Hardware User Manual
Revision History
Version
Date
Comment
1.0
2020/3/16
᪂つసᡂ
1.1
2020/8/28
PS
㒊
CLK
ኚ᭦ࠊ
J1,J2
ࢥࢿࢡࢱᆺ␒ኚ᭦
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ADZBT1HP Hardware User Manual
┠ḟ
1Overview............................................................................................................................................. 4
2Block Diagram ................................................................................................................................... 5
3ᶵ⬟ㄝ.............................................................................................................................................. 6
3.1Power Supply.............................................................................................................................. 7
3.2Zynq FPGA Configration ........................................................................................................... 8
3.3JTAG I/F.................................................................................................................................... 10
3.4QSPI Flash................................................................................................................................ 10
3.5DDR Memory ............................................................................................................................ 10
3.6USB Serial Port........................................................................................................................ 11
3.7MicroSD Slot............................................................................................................................. 11
3.8Clock Source ............................................................................................................................. 11
3.9User I/O..................................................................................................................................... 12
3.10LED ........................................................................................................................................... 15
3.11DIP SW...................................................................................................................................... 16
4Appendix .......................................................................................................................................... 17
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ADZBT1HP Hardware User Manual
1 Overview
ᮏFPGA ࣮࣎ࢻࠊADZBT1HP ࡢᵝࡘ࠸࡚グ㍕ࡋࡲࡍࠋ
ADZBT1-Dualcore
FPGA
XC7Z010(Zynq)Pakage㸸CLG400
Processor Core
Dual-Core
ARM Coretex-A9 MPCore
Up to 866MHz
Processor
Extensions
NEON SIMD Engine and Single/Double Precision
Floating Point Unit Per Processor
L1 Cache
32KB Instruction, 32KB Data per processor
L2 Cache
512KB
On-Chip Memory
256KB
DRAM
DDR3L 512MB
QSPI Flash
512Mb(64MB)
UART
Micro USB UART Debug I/F㸦USB Micro B㸧
SD Card
SD Card x 1
Connect I/O
133 Pin User I/O
I/O ࡣ௨ୗࡢ⏝㏵ᣑᙇྍ⬟ࠋ
USB2.0(OTG) , Gigabit Ether,
UART, CAN 2.0B, I2C, SPI, GPIO, User I/F
Power
DC In : 5V㸦ᣑᙇࢥࢿࢡࢱࡽ౪⤥㸧 / Micro USB : 5V
Programmable Logic
Logic Cells
28K
Look-up Tables
(LUTs)
17,600
Flip-Flop
35,200
Total Block RAM
2.1Mb
DSP Slice
80
Board Size
50.0mm x 50.0mm
ືస ᗘ⠊ᅖ
0㹼85Υ
ᾘ㈝㟁ຊ
⣙1.5W㸦5Vࠊ300mA ௨ୗCPU ࡣDhrystone ᐇ⾜㸧
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ADZBT1HP Hardware User Manual
2 Block Diagram
ADZBT1 ࡢࣈࣟࢵࢡᵓᡂࢆࠊ௨ୗ♧ࡋࡲࡍࠋ
㻽㻿㻼㻵㻌㻲㼘㼍㼟㼔
㻢㻠㻹㻮
㻰㻵㻼㼋㻿㼃㻌㻞ಶ
㻸㻱㻰㻟ಶ
㼁㻿㻮㻌㼠㼛㻌㻿㼑㼞㼕㼍㼘
㼁㻭㻾㼀
㼁㻿㻮㻌㻹㼕㼏㼞㼛
㻼㼛㼣㼑㼞㻌㼟㼛㼡㼞㼏㼑
㻿㼑㼘㼑㼏㼠
㻡㼂㻡㼂
㻰㻯㻛㻰㻯
㻿㻰㻌㻯㼍㼞㼐
㻯㼛㼚㼚㼑㼏㼠㼛㼞㻞
Zync FPGA
XC7Z010
CLG400
䠄㻭㻾㻹㻌㻯㼛㼞㼑㼠㼑㼤㻙㻭㻥
㻼㼞㼛㼏㼑㼟㼟㼛㼞㻌
䠇㻌
㻲㻼㻳㻭㻌㼁㼟㼑㼞㻌㻸㼛㼓㼕㼏䠅
㻯㼛㼚㼚㼑㼏㼠㼛㼞㻝
㼀㼛㻌㻯㼛㼙㼜㼡㼠㼑㼞
㻰㻰㻾㻟㻸
㻡㻝㻞㻹㻮
㻾㼑㼟㼑㼠㻌㻮㼡㼠㼠㼛㼚
㻼㼛㼣㼑㼞㻌㻸㻱㻰
㻰㼛㼚㼑㻌㻸㻱㻰
㻜㻚㻢㻣㻡㼂
䠍㻚㻜㼂
㻝㻚㻤㼂
㻝㻚㻟㻡㼂
㻟㻚㻟㼂
㻮㼛㼛㼠㻌㻹㼛㼐㼑㻌㻿㼃
㻻㻿㻯㻌㻟㻟㻹㻴䡖
㻼㻿㒊
㻼㻸㒊
㻼㻿㒊䠇㻼㻸㒊ಙྕ
㻢㻣㻼㼕㼚㻙㼁㼟㼑㼞㻌㻵㻻
㻼㻸㒊ಙྕ䠖㻢㻢㻼㼕㼚㻙㼁㼟㼑㼞㻌㻵㻻
㻶㼀㻭㻳ಙྕ䝁䝛䜽䝍
㻭㻰㼆㻮㼀㻝ᅇ㊰ᵓᡂ
㻡㼂እ㒊౪⤥
䠄㻿㼁㻮ᇶᯈ䛛䜙䠅
㻟㻚㻟㼂䚸㻝㻚㻤㼂౪⤥
㻡㼂እ㒊౪⤥
䠄㻿㻰㻛㻲㼘㼍㼟㼔㻛㻶㼀㻭㻳䠅
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ADZBT1HP Hardware User Manual
3 ᶵ⬟ㄝ
ADZBT1 ࡢᶵ⬟ࡘ࠸࡚ࠊ௨ୗㄝࡋࡲࡍࠋ
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ADZBT1HP Hardware User Manual
3.1 Power Supply
ADZBT1 ࡢ㟁※ࡣࠊձMicro USBࠊղSUB ᇶᯈ⤒⏤ࠊճእ㒊㟁※౪⤥ࡢ㸱㏻ࡾࡽ⤥㟁ࡍࡿࡇࡀ
࡛ࡁࡲࡍࠋ⤥㟁ࡢษࡾ᭰࠼ࡣࠊࢪࣕࣥࣃࡼࡾษࡾ᭰࠼ࡲࡍࠋ
ձMicro USB ࡽ 5V ⤥㟁ࡍࡿሙྜ㸸ࢪࣕࣥࣃ᥋⥆
㼁㻿㻮 㻰㻯㻡㼂
㻝㻚㻤㼂㻛㻟㻚㻟㼂㻡㼂
㻭㻰㼆㻮㼀㻝
㻰㻯㻛㻰㻯
㻹㼕㼏㼞㼛㻌㼁㻿㻮 㻶㼡㼚㼜㼑㼞
䝁䝛䜽䝍䠎 䝁䝛䜽䝍䠍
ղࢥࢿࢡࢱ⤒⏤㸦SUB ᇶᯈ➼㸧5V ⤥㟁ࡍࡿሙྜ㸸ࢪࣕࣥࣃᮍ᥋⥆
㻭㻯
䜰䝎䝥䝍䞊
㻰㻯㻡㼂 㻡㼂
㻿㼁㻮ᇶᯈ
㻝㻚㻤㼂㻔㻜㻚㻟㻭㻌㻹㻭㼄䠅
㻟㻚㻟㼂㻔㻝㻚㻞㻭㻌㻹㻭㼄䠅
㻝㻚㻤㼂㻛㻟㻚㻟㼂
㻝㻚㻤㼂㻛㻟㻚㻟㼂㻡㼂
㻭㻰㼆㻮㼀㻝
㻰㻯㻛㻰㻯
㻹㼕㼏㼞㼛㻌㼁㻿㻮 㻶㼡㼚㼜㼑㼞
䝁䝛䜽䝍䠎 䝁䝛䜽䝍䠍
ճୖグ௨እእ㒊ࡽ 5V ⤥㟁ࡍࡿሙྜ㸸ࢪࣕࣥࣃᮍ᥋⥆
5V/GND ࢆ᥋⥆ࡋ┤᥋౪⤥ࡍࡿࡇࡀྍ⬟࡞ࡗ࡚࠸ࡲࡍࠋ
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ADZBT1HP Hardware User Manual
3.2 Zynq FPGA Configration
Zynq FPGA ࡢConfigration ࡣࠊQSPI/JTAG/SDCard ࡢ㸱ࡘࡢ Boot Mode ࡽ㑅ᢥ࡛ࡁࡲࡍࠋ
Mode ࡢษࡾ᭰࠼ࡣࠊDIP_SW3㸦M0㸧ࠊDIP_SW4㸦M1㸧ࡼࡾษࡾ᭰࠼ࡲࡍࠋ
DIP SW ࡢタᐃ⾲ࢆ௨ୗ♧ࡋࡲࡍࠋ
タᐃ Mode
DIP SW4㸦M1㸧
DIP SW3㸦M0㸧
QSPI Mode
OFF
OFF
JTAG Mode
OFF
ON
SD Card Mode
ON
OFF
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ADZBT1HP Hardware User Manual
ڦJTAG Mode
Xilinx SDK ࢆ⏝ࡋ࡚ࢯࣇࢺ࢙࢘ࡢࢹࣂࢵࢢཬࡧࠊ Xilinx Vivado ࢆ⏝ࡋ࡚ࣁ࣮ࢻ࢙࢘
ࡢ FPGA ࡢෆ㒊ಙྕࢆࣔࢽࢱࡋ࡚ࢹࣂࢵࢢࡍࡿࡇࡀ࡛ࡁࡲࡍࠋ
ࡲࡓࠊQSPI Boot Mode ࡛⏝ࡍࡿ㝿ࠊQSPI ࡢ᭩ࡁ㎸ࡳ JTAG Mode ࢆ⏝ࡋࡲࡍࠋ
JTAG Mode ࡢタᐃ
ڦQSPI Boot Mode
ADZBT1 ࡣࠊQuad-SPI Serial Flash ࢆᐇࡋ࡚࠸ࡲࡍࠋ
࣮࣎ࢻࡢ㟁※㉳ືᚋࠊQSPI ಖᏑࡉࢀ࡚࠸ࡿ࣓࣮ࢪࢆㄞࡳ㎸ࢇ࡛ࠊ㉳ືࡍࡿࡇࡀ࡛ࡁࡲ
ࡍࠋ
QSPI Boot Mode ࡢタᐃ
ᡭ㡰㸸
1) DIP_SW3=ON ࡋ࡚ࠊJTAG Mode ࡋࡲࡍࠋ
2) ࣮࣎ࢻࡢ㟁※ࢆ᥋⥆ࡋࡲࡍࠋ
3) Xilinx JTAG ࢲ࣮࢘ࣥࣟࢻࢣ࣮ࣈࣝࡽࠊXilinx SDK ࢆࡗ࡚ QSPI ᭩ࡁ㎸ࡳࡲࡍࠋ
4) ᭩ࡁ㎸ࡳᚋࠊDIP_SW3=OFF ࡋ࡚ࠊQSPI Mode ࡋࡲࡍ
5) ࣮࣎ࢻࡢ㟁※ࢆ OFF ࡋࡲࡍࠋ
6) ᗘ㟁※ࢆ ON ࡍࡿࠊQSPI ᱁⣡ࡉࢀ࡚࠸ࡿ࣓࣮ࢪࡀㄞࡳฟࡉࢀ࡚ࠊ
FPGA ࢥࣥࣇࢢ࣮ࣞࢩࣙࣥࡀ⾜ࢃࢀࡲࡍࠋ
ڦSD_Card Boot Mode
SD Card ᱁⣡ࡉࢀ࡚࠸ࡿ Boot ⏝ࢹ࣮ࢱࢆࡗ࡚ Boot ࡍࡿࡇࡀ࡛ࡁࡲࡍࠋ
SD Card Boot Mode ࡢタᐃ
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3.3 JTAG I/F
JTAG I/F ࡣࠊ6Pin ࢥࢿࢡࢱ㸦PSL-210203-06㸧ࢆ⏝ࡋ࡚࠸ࡲࡍࠋ
ಙྕ㓄⨨ࡣ௨ୗࡢࡼ࠺࡞ࡾࡲࡍࠋ
3.4 QSPI Flash
QSPI I/F ࡣࠊ3.3V ᑐᛂࡢࠊMicron㸸MT25QL512㸦64MB㸧ࢆ⏝ࡋ࡚࠸ࡲࡍࠋ
㟁※ᢞධᚋࡢࠊFirst Stage Loader ࢆಖᏑࡍࡿࡓࡵ⏝ࡉࢀࡲࡍࠋ
FPGA ࡢPin 㓄⨨ࡣ௨ୗグ㍕ࡋࡲࡍࠋ
㻹㻵㻻㻞
㻹㻵㻻㻝
㻹㻵㻻㻟
㻹㻵㻻㻠
㻹㻵㻻㻡
㻹㻵㻻㻢
㻲㻼㻳㻭
㻯㻿
㻰㻜
㻰㻝
㻰㻞
㻰㻟
㻯㻸㻷
㻽㻿㻼㻵
3.5 DDR Memory
DDR Memory ࡣࠊDDR3LMicron㸸MT41K256M16㸦512MB㸧ࢆ⏝ࡋ࡚࠸ࡲࡍࠋ
Table of contents
