NXP Semiconductors PN7462 series User manual

UM10858

PN7462 family HW user manual

Rev. 1.4 — 14 May 2018

314514

User manual

COMPANY PUBLIC

Document information

Info

Content

Keywords

PN7462, PN7462 family, PN7362; PN7360; NFC reader

Abstract

This document describes how to use the PN7462 family.

NXP Semiconductors

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PN7462 family HW user manual

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Contact information

For more information, please visit:

http://www.nxp.com

Revision history

Rev

Date

Description

1.4

20180514

Editorial updates

1.3

20180212

Reworking the document to describe complete PN7462 family

SDA hold equation added

1.2

20170908

GPIO wakeup condition corrected

Pull-up and pull-down configuration for SPIM pins corrected

CRC polynomial specified

1.1

20170216

Max enhanced ESD protection changed to 12 kV

Dynamic Power Control (DPC) added

1.0

20160225

Initial version

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PN7462 family HW user manual

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1. Introduction

1.1 General description

The PN7462 family is a family of 32-bit ARM Cortex-M0-based NFC microcontrollers

offering high performance and low power consumption. It has a simple instruction set and

memory addressing along with a reduced code size compared to existing architectures.

PN7462 family offers an all in one solution, with features such as NFC, microcontroller,

optional contact smart card reader, and software in a single chip. It operates at CPU

frequencies of up to 20 MHz. The PN7462 family consists of six different products.

For more details on all products of the PN7462 family refer to the data sheet.

Having the differences listed in the table above, all products within the PN7462 family are

equipped with 12 kB of SRAM data memory and 4 kB EEPROM. All products within the

family also include one host interface with either high-speed mode I2C-bus, SPI, USB or

high-speed UART, and two master interfaces, SPI and Fast-mode Plus I2C-bus. Four

general-purpose counter/timers, a random number generator, one CRC coprocessor and

up to 21 general-purpose I/O pins.

The PN7462 family NFC microcontroller offers a one chip solution to build contactless, or

contact and contactless applications. It is equipped with a highly integrated high-power

output NFC-IC for contactless communication at 13.56 MHz enabling EMV-compliance

on RF level, without additional external active components.

PN7462 family supports the following operating modes:

•read/write mode supporting ISO/IEC 1443A and MIFARE ICs

•JIS X 6319-4 (comparable with FeliCa scheme)

•ISO/IEC 15693, ICODE, ISO/IEC 18000-3 mode 3

•NFC protocols - tag reader/writer, P2P

•ISO/IEC 14443- type A card emulation

•EMVCo compliance

In this document the term „MIFARE Classic card“ refers to a MIFARE Classic IC-based

contactless card and the term „MIFARE Plus card“ refers to a MIFARE Plus IC-based

contactless card.

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1.2 Features and benefits

1.2.1 Integrated contact interface front-end

This chapter applies to the products with contact interface only.

•Class A, B, and C cards can work on 1.8 V, 3 V, and 5 V supply

•Specific ISO UART, variable baud rate through frequency or division ratio

programming, error management at character level for T = 0, and extra guard

time register

•DC-to-DC converter for class A support starting at 3 V, and class B support

starting at 2.7 V

•Thermal and short-circuit protection on contact cards

•Automatic activation and deactivation sequence, initiated by software or by

hardware in case of short-circuit, card removal, overheating, and VDD or VDD

drop-out

•Enhanced ESD protection (> 12 kV)

•ISO/IEC 7816 compliant

•EMVCo 4.3 compliant

•Clock generation up to 13.56 MHz

•Synchronous card support

•Possibility to extend the number of contact interfaces, with the addition of slot

extenders such as TDA8026

1.2.2 Integrated ISO/IEC 7816-3&4 UART interface

This chapter applies to the products with Integrated ISO/IEC 7816 UART interface

only.

The PN7462 family offers the possibility to extend the number of contact interfaces

available. It uses an I/O auxiliary interface to connect a slot extension (TDA8035 - 1 slot,

TDA8020 - 2 slots, and TDA8026 - 5 slots).

•Class A (5 V), class B (3 V), and class C (1.8 V) smart card supply

•Protection of smart card

•Three protected half-duplex bidirectional buffered I/O lines (C4, C7, and C8)

•Compliant with ISO/IEC 7816 and EMVCo 4.3 standards

1.2.3 Integrated contactless interface front end

•High RF output power frontend IC for transfer speeds up to 848 kbit/s

•NFC IP1 and NPFC IP2 support

•Full NFC Tag support (Type 1, Type 2, Type 3, Type 4 A and B)

•P2P active and passive, target and initiator

•Card emulation ISO14443 type A

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•ISO/IEC 14443 Type A and B

•Support for MIFARE Classic card

•ISO/IEC 15693 and ISO/IEC 18000-3 mode 3

•iClass serial number support

•Low power card detection function

•Compliance with EMV Contactless protocol specification

•Compliance with NFC standard

1.2.4 Cortex M0 microcontroller

•Processor core

−32-bit ARM cortex M0 processor

−Built-in Nested Vectored Interrupt Controller (NVIC)

−Non-maskable interrupt

−System Tick Timer 24 bits

−Running frequency up to 20 MHz

−Clock management to enable low power consumption

•Memory

−Flash: 160 kB

−RAM: 12 kB

−EEPROM: 4 kB

−40 K boot ROM included, including USB mass storage primary boot loader for

code download.

•Debug Option

−Serial Wire Debug interface (SWD)

•Master Interfaces:

−SPI half-duplex, up to 6.78 Mbit/s

−I²C supporting fast mode plus, and clock stretching

•Host Interfaces

−HSUART for serial communication, supporting standards speeds from 9600 to

115200 bps, and faster speed up to 1.288 Mbit/s

−SPI half-duplex and full duplex, up to 7 Mbit/s

−I²C Host supporting standard, fast and high-speed mode with multiple address

support

−USB 2.0 full speed, with USB 3.0 hub connection capability

•Up to 21 General-Purpose I/O (GPIO) with configurable pull-up/pull-down resistors

•GPIOs 1 to 12 can be used as edge and level sensitive interrupt sources

•Power

−Two reduced power modes: Sleep mode and hard power down mode

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−Suspend mode for USB host interface

−Processor wake-up from hard power down mode, stand-by mode, suspend mode

via: host interface, contact card interface, GPIOs, RF field detection

−Integrated PMU to automatically adjust internal regulators, to minimize the power

consumption during all possible power modes.

−Power-on reset

−RF supply; external, or using an integrated LDO (TXLDO configurable with 3 V,

3.3 V, 3.6 V, 4.5 V, and 4.75 V)

−Pad voltage supply: external 3.3 V or 1.8 V, or using an integrated LDO (3.3 V

supply)

−Integrated contact interface voltage regulation for 1.8 V, 3 V, and 5 V card supply,

including a DC-to-DC converter for support of Class A and Class B cards

•Timers

−Four general-purpose timers

−Programmable WatchDog Timer (WDT)

•CRC coprocessor

•Random number generator

•Clocks

−Crystal oscillator 27.12 MHz

−Dedicated PLL 48 MHz for the USB

−Integrated HFO 20 MHz and LFO 380 kHz

•General

−HVQFN64 packaging

−Temperature range: -40 °C to 85 °C

1.3 Derivates

1.3.1 PN7462AUEV features

Supports all PN7462AU features except ISO 7816 contact interface pins not exposed

(AUX pins still available)

1.3.2 PN7362AU features

Supports all PN7462AU features except ISO 7816 interface

1.3.3 PN7360AU features

Supports all PN7462AU features except ISO 7816 interface and reduced flash size

(80kB)

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PN7462 family HW user manual

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1.4 Ordering information

Table 1. Ordering information

Type Number

Package

Name

Description

Version

PN7462AUHN

HVQFN64

160 kB memory; contact interface; ISO/IEC 7816-3&4

UART interface;

plastic thermal enhanced very thin quad flat package; no

leads; 64 terminals; body 9 × 9 × 0.85 mm

SOT804-4

PN7462AUEV

VFBGA64

160 kB memory; no contact interface; ISO/IEC

7816-3&4 UART interface;

plastic very thin fine-pitch ball grid array package; 64

balls; 4.5 mm x 4.5 mm x 0.80 mm

SOT1307-2

PN7362AUHN

HVQFN64

160 kB memory; no contact interface; no ISO/IEC

7816-3&4 UART interface;

plastic thermal enhanced very thin quad flat package; no

leads; 64 terminals; body 9 × 9 × 0.85 mm

SOT804-4

PN7362AUEV

VFBGA64

160 kB memory; no contact interface; no ISO/IEC

7816-3&4 UART interface;

plastic very thin fine-pitch ball grid array package; 64

balls; 4.5 mm x 4.5 mm x 0.80 mm

SOT1307-2

PN7360AUHN

HVQFN64

80 kB memory; no contact interface; no ISO/IEC

7816-3&4 UART interface;

plastic thermal enhanced very thin quad flat package; no

leads; 64 terminals; body 9 × 9 × 0.85 mm

SOT804-4

PN7360AUEV

VFBGA64

80 kB memory; no contact interface; no ISO/IEC

7816-3&4 UART interface;

plastic very thin fine-pitch ball grid array package; 64

balls; 4.5 mm x 4.5 mm x 0.80 mm

SOT1307-2

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1.5 Block diagram PN7462 HVQFN64

Fig 1. Block diagram

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1.6 Block diagram PN7462 VFBGA64

Fig 2. Block diagram

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1.7 Block diagram PN736X

Fig 3. Block diagram

This manual suits for next models

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