Linear Technology LTC1872 User manual

LTC1872

1872fa

For more information www.linear.com/LTC1872

Typical applicaTion

FeaTures DescripTion

Constant Frequency

Current Mode Step-Up

DC/DC Controller in SOT-23

The LT C

1872 is a constant frequency current mode step-

up DC/DC controller providing excellent AC and DC load

and line regulation.The device incorporates an accurate

undervoltagelockoutfeaturethatshutsdown the LTC1872

when the input voltage falls below 2.0V.

The LTC1872 boasts a ±2.5% output voltage accuracy

and consumes only 270µA of quiescent current.For ap-

plications where efficiency is a prime consideration,the

LTC1872 is configured for Burst Mode operation,which

enhances efficiency at low output current.

In shutdown,the device draws a mere 8µA. The high

550kHz constant operating frequency allows the use of a

small external inductor.

The LTC1872 is available in a small footprint 6-lead

SOT-23.

applicaTions

n High Efﬁciency: Over 90%

n High Output Currents Easily Achieved

n Wide VIN Range: 2.5V to 9.8V

n VOUT Limited Only by External Components

n Constant Frequency 550kHz Operation

n Burst Mode™ Operation at Light Load

n Current Mode Operation for Excellent Line and Load

Transient Response

n Low Quiescent Current: 270µA

n Shutdown Mode Draws Only 8µA Supply Current

n ±2.5% Reference Accuracy

n Tiny 6-Lead SOT-23 Package

n Lithium-Ion-Powered Applications

n Cellular Telephones

n Wireless Modems

n Portable Computers

n Scanners

L,LT ,LT C ,LT M ,Burst Mode,Linear Technology and the Linear logo are registered trademarks

of Linear Technology Corporation. All other trademarks are the property of their respective

owners.

Figure 1. LTC1872 High Output Current 3.3V to 5V Boost Converter

Efficiency vs Load Current

ITH/RUN

LTC1872

147k

422k

80.6k

0.03Ω

4.7µH

220pF

C1: TAIYO YUDEN CERAMIC EMK325BJ106MNT

C2: MURATA GRM42-2X5R226K6.3

D1: IR10BQ015

L1: MURATA LQN6C4R7M04

M1: IRLMS2002

R1: DALE 0.25W

GND

VFB

1872 TA01

3NGATE

VIN

SENSE–

10µF

10V

VIN

3.3V

VOUT

2×22F

6.3V

M1 D1

LOAD CURRENT (mA)

EFFICIENCY (%)

100

10 100 1000

1872 TA01b

VIN = 3.3V

VOUT = 5V

LTC1872

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For more information www.linear.com/LTC1872

pin conFiguraTionabsoluTe MaxiMuM raTings

Input Supply Voltage (VIN)......................... –0.3V to 10V

SENSE–, NGATE Voltages ............. –0.3V to (VIN + 0.3V)

VFB, ITH/RUN Voltages .............................. –0.3V to 2.4V

NGATE Peak Output Current (<10µs) ........................ 1A

Storage Ambient Temperature Range ....–65°C to 150°C

Operating Temperature Range (Note 2)....–40°C to 85°C

Junction Temperature (Note 3) ............................ 150°C

Lead Temperature (Soldering, 10 sec)................... 300°C

(Note 1)

TH/RUN 1

GND 2

VFB 3

6 NGATE

5 VIN

4 SENSE

–

TOP VIEW

S6 PACKAGE

6-LEAD PLASTIC SOT-23

TJMAX = 150°C, θJA = 230°C/W

orDer inForMaTion

elecTrical characTerisTics

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 2: The LTC1872E is guaranteed to meet performance specifications

from 0°C to 70°C. Specifications over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls.

Note 3: TJis calculated from the ambient temperature TAand power

dissipation PDaccording to the following formula:

TJ= TA+ (PD•θJA°C/W)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Input DC Supply Current

Normal Operation

Sleep Mode

Shutdown

UVLO

Typicals at VIN = 4.2V (Note 4)

2.4V ≤ VIN ≤ 9.8V

2.4V ≤ VIN ≤ 9.8V, VITH/RUN = 0V

VIN < UVLO Threshold

270

230

420

370

µA

Undervoltage Lockout Threshold VIN Falling

VIN Rising

l1.55

1.85

2.00

2.10

2.35

2.40

Shutdown Threshold (at ITH/RUN) l0.15 0.35 0.55 V

Start-Up Current Source VITH/RUN = 0V 0.25 0.5 0.85 µA

Regulated Feedback Voltage 0°C to 70°C(Note 5)

–40°C to 85°C(Note 5)

0.780

0.770

0.800

0.820

0.830

VFB Input Current (Note 5) 10 50 nA

Oscillator Frequency VFB = 0.8V 500 550 650 kHz

Gate Drive Rise Time CLOAD = 3000pF 40 ns

Gate Drive Fall Time CLOAD = 3000pF 40 ns

Peak Current Sense Voltage (Note 6) 114 120 mV

The ldenotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA= 25°C. VIN = 4.2V unless otherwise specified. (Note 2)

LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC1872ES6#PBF LTC1872ES6#TRPBF LTMK 6-Lead Plastic SOT-23 –40°C to 85°C

Consult LTC Marketing for parts specified with wider operating temperature ranges.

Consult LTC Marketing for information on nonstandard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

Note 4: Dynamic supply current is higher due to the gate charge being

delivered at the switching frequency.

Note 5: The LTC1872 is tested in a feedback loop that servos VFB to the

output of the error amplifier.

Note 6: Guaranteed by design at duty cycle = 30%. Peak current sense

voltage is VREF/6.67 at duty cycle <40%, and decreases as duty cycle

increases due to slope compensation as shown in Figure 2.

LTC1872

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For more information www.linear.com/LTC1872

Typical perForMance characTerisTics

Reference Voltage

vs Temperature

Undervoltage Lockout Trip

Voltage vs Temperature

Shutdown Threshold

vs Temperature

Maximum Current Sense Trip

Voltage vs Duty Cycle

Normalized Oscillator Frequency

vs Temperature

TEMPERATURE (°C)

–55

775

VFB VOLTAGE (mV)

780

790

795

800

825

810

–15 25 45 125

1872 G01

785

815

820

805

–35 5 65 85 105

VIN = 4.2V

TEMPERATURE (°C)

–55

–10

NORMALIZED FREQUENCY (%)

–8

–4

–2

–15 25 45 125

1872 G02

–6

–35 5 65 85 105

VIN = 4.2V

TEMPERATURE (°C)

–55

1.84

UVLO TRIP VOLTAGE (V)

1.88

1.96

2.00

2.04

2.24

2.12

–15 25 45 125

1872 G03

1.92

2.16

2.20

2.08

–35 5 65 85 105

VIN FALLING

DUTY CYCLE (%)

20 30

VIN – VSENSE– (mV)

100

1872 G04

40 50 60 70 80 90

130

120

110

100

VIN = 4.2V

TA= 25°C

TEMPERATURE (°C)

–55

200

ITH/RUN VOLTAGE (mV)

240

320

360

400

600

480

–15 25 45 125

1872 G05

280

520

560

440

–35 5 65 85 105

VIN = 4.2V

pin FuncTions

ITH/RUN (Pin 1): This pin performs two functions.It

serves as the error amplifier compensation point as well

as the run control input.Nominal voltage range for this

pin is 0.7V to 1.9V. Forcing this pin below 0.35V causes

the device to be shut down.In shutdown all functions are

disabled and the NGATE pin is held low.

GND (Pin 2): Ground Pin.

VFB (Pin 3): Receives the feedback voltage froman external

resistive divider across the output.

SENSE–(Pin 4): The Negative Input to the Current Com-

parator.

VIN (Pin 5): Supply Pin.Must be closely decoupled to

GND Pin 2.

NGATE (Pin 6): Gate Drive for the External N-Channel

MOSFET. This pin swings from 0V to VIN.

LTC1872

1872fa

For more information www.linear.com/LTC1872

FuncTional DiagraM

operaTion

Main Control Loop

The LTC1872 is a constant frequency current mode

switching regulator.During normal operation,the external

N-channel power MOSFET is turned on each cycle by the

oscillator and turned off when the current comparator

(ICMP) resets the RS latch.The peak inductor current

at which ICMP resets the RS latch is controlled by the

voltage on the ITH/RUN pin,which is the output of the

error amplifier EAMP.An external resistive divider con-

nected between VOUT and ground allows the EAMP to

receive an output feedback voltage VFB.When the load

current increases,it causes a slight decrease in VFB

SWITCHING

LOGIC AND

BLANKING

CIRCUIT

–

0.15V

0.5µA

0.3V

SLEEP

OVP

BURST

CMP

SHDN

1.2V

1872FD

VREF

60mV

VREF

0.8V

VIN

VOLTAGE

REFERENCE

SLOPE

COMP

ICMP

FREQ

FOLDBACK

OSC

SENSE–

VIN

–

EAMP

VFB

–

NGATE

VIN

ITH/RUN

VIN

0.35V

VREF

0.8V

–

SHDN

CMP

0.3V

GND

–

UNDERVOLTAGE

LOCKOUT

VIN

(Refer to Functional Diagram)

relative to the 0.8V reference,which in turn causes the

ITH/RUN voltage to increase until the average inductor

current matches the new load current.

The main control loop is shut down by pulling the ITH/

RUN pin low.Releasing ITH/RUN allows an internal 0.5µA

current source to charge up the external compensation

network. When the ITH/RUN pin reaches 0.35V, the main

control loop is enabled with the ITH/RUN voltage then

pulled up to its zero current level of approximately 0.7V.

As the external compensationnetwork continues to charge

up, the corre

sponding output current trip level follows,

allowing normal operation.

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For more information www.linear.com/LTC1872

operaTion

Comparator OVP guards against transient overshoots

>7.5% by turning off the external N-channel power

MOSFET and keeping it off until the fault is removed.

Burst Mode Operation

The LTC1872 enters Burst Mode operation at low load

currents. In this mode,the peak current of the inductor is

set as if VITH/RUN = 1V (at low duty cycles)even though

the voltage at the ITH/RUN pin is at a lower value.If the

inductor’s average current is greater than the load require-

ment, the voltage at the ITH/RUN pin will drop.When the

ITH/RUN voltage goes below 0.85V, the sleep signal goes

high, turning off the external MOSFET.The sleep signal

goes low when the ITH/RUN voltage goes above 0.925V

and the LTC1872 resumes normal operation.The next

oscillator cycle will turn the external MOSFET on and the

switching cycle repeats.

Undervoltage Lockout

To prevent operation of the N-channel MOSFET below safe

input voltage levels,an undervoltage lockout is incorpo-

rated into the LTC1872. When the input supply voltage

drops below approximately 2.0V, the N-channel MOSFET

and all circuitry is turned off except the undervoltage block,

which draws only several microamperes.

Overvoltage Protection

The overvoltage comparator in the LTC1872 will turn the

external MOSFET off when the feedback voltage has risen

7.5%above the reference voltage of 0.8V. This comparator

has a typical hysteresis of 20mV.

Slope Compensation and Inductor’s Peak Current

The inductor’s peak current is determined by:

IPK =

ITH−

0.7

10 RSENSE

( )

when the LTC1872 is operating below 40% duty cycle.

However, once the duty cycle exceeds 40%, slope com-

pensation begins and effectively reduces the peak inductor

current.The amount of reduction is given by the curves

in Figure 2.

Short-Circuit Protection

Since the power switch in a boost converter is not in

series with the power path from input to load,turning off

the switch provides no protection from a short-circuit at

the output.External means such as a fuse in series with

the boost inductor must be employed to handle this fault

condition.

Figure 2. Maximum Output Current vs Duty Cycle

DUTY CYCLE (%)

110

100

SF = IOUT/IOUT(MAX) (%)

1872 F02

0 70 80 90 1006010 20 30 40 50

IRIPPLE = 0.4IPK

AT 5% DUTY CYCLE

IRIPPLE = 0.2IPK

AT 5% DUTY CYCLE

VIN = 4.2V

LTC1872

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For more information www.linear.com/LTC1872

The basic LTC1872 application circuit is shown in

Figure1. External component selection is driven by the

load requirement and begins with the selection of L1and

RSENSE (= R1). Next,the power MOSFET and the output

diode D1is selected followed by CIN(= C1) and COUT(= C2).

RSENSE Selection for Output Current

RSENSE is chosen based on the required output current.

With the current comparator monitoring the voltage de-

veloped across RSENSE,the threshold of the comparator

determines the inductor’s peak current.The output current

the LTC1872 can provide is given by:

IOUT =0.12

RSENSE

−IRIPPLE









VIN

VOUT +VD

where IRIPPLE is the inductor peak-to-peak ripple current

(see Inductor Value Calculation section)and VDis the

forward drop of the output diode at the full rated output

current.

A reasonable starting point for setting ripple current is:

IRIPPLE =O.4

( )

IOUT

( )

OUT +

Rearranging the above equation, it becomes:

RSENSE =1

( )

IOUT

( )

VIN

VOUT +VD











for Duty Cycle <40%

However, for operation that is above 40% duty cycle,slope

compensation’s effect has to be taken into consideration

to select the appropriate value to provide the required

amount of current. Using the scaling factor (SF, in %) in

Figure 2, the value of RSENSE is:

RSENSE =SF

( )

IOUT

( )

100

( )

VIN

VOUT +VD











applicaTions inForMaTion

Inductor Value Calculation

The operating frequency and inductor selection are inter-

related in that higher operating frequencies permit the use

of a smaller inductor for thesame amount of inductor ripple

current. However,this is at the expense of efficiency due

to an increase in MOSFET gate charge losses.

The inductance value also has a direct effect on ripple

current. The ripple current,IRIPPLE,decreases with higher

inductance or frequency and increases with higher VOUT.

The inductor’s peak-to-peak ripple current is given by:

IRIPPLE =VIN

f L

( )

VOUT +VD−VIN

VOUT +VD











where f is the operating frequency.Accepting larger values

of IRIPPLE allows the use of low inductances,but results

in higher output voltage ripple and greater core losses.

A reasonable starting point for setting ripple current is:

IRIPPLE =0.4 IOUT MAX

( )

VOUT +VD

VIN











In Burst Mode operation,the ripple current is normally set

such that the inductor current is continuous during the

burst periods.Therefore,the peak-to-peak ripple current

must not exceed:

IRIPPLE ≤

0.03

SENSE

This implies a minimum inductance of:

LMIN =VIN

f0.03

RSENSE











VOUT +VD−VIN

VOUT +VD











A smaller value than LMIN could be used in the circuit;

however, the inductor current will not be continuous

during burst periods.

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For more information www.linear.com/LTC1872

applicaTions inForMaTion

Inductor Selection

When selecting the inductor,keep in mind that inductor

saturation current has to be greater than the current limit

set by the current sense resistor.Also,keep in mind that

the DC resistance of the inductor will affect the efficiency.

Off the shelf inductors are available from Murata,Coilcraft,

Toko, Panasonic, Coiltronics and many other suppliers.

Power MOSFET Selection

The main selection criteria for the power MOSFET are the

threshold voltage VGS(TH),the “on” resistance RDS(ON),

reverse transfer capacitance CRSS and total gate charge.

Since the LTC1872 is designed for operation down to low

input voltages,a logic level threshold MOSFET (RDS(ON)

guaranteed at VGS = 2.5V) is required for applications

that work close to this voltage.When these MOSFETs are

used, make sure that the input supply to the LTC1872 is

less than the absolute maximum VGS rating,typically 8V.

Therequired minimum RDS(ON)of the MOSFET is governed

by its allowable power dissipation given by:

RDS(ON) ≅

( )

IIN21+δp

( )

where PPis the allowable power dissipation and δp is the

temperature dependency of RDS(ON). (1 + δp) is generally

given for a MOSFET in the form of a normalized RDS(ON)

vs temperature curve,but δp = 0.005/°C can be used as

an approximation for low voltage MOSFETs.DC is the

maximum operating duty cycle of the LTC1872.

Output Diode Selection

Under normal load conditions,the average current con-

ducted by the diode in a boost converter is equal to the

output load current:

D(avg) =

OUT

It is important to adequately specify the diode peak cur-

rent and average power dissipation so as not to exceed

the diode ratings.

Schottky diodes are recommended for low forward drop

and fast switching times.Remember to keep lead length

short and observe proper grounding (see Board Layout

Checklist) to avoid ringing and increased dissipation.

CIN and COUT Selection

To prevent large input voltage ripple,a low ESR input

capacitor sized for the maximum RMS current must be

used. The maximum RMS capacitor current for a boost

converter is approximately equal to:

Required I

RMS ≈

0.3

( )

RIPPLE

where IRIPPLE is as defined in the Inductor Value Calcula-

tion section.

Notethatcapacitor manufacturer’s ripple currentratings are

oftenbased on 2000 hours of life.This makes it advisable to

further derate the capacitor,or to choose a capacitor rated

at a higher temperature than required.Several capacitors

may be paralleled to meet the size or height requirements

in the design.Due to the high operating frequency of the

LTC1872, ceramic capacitors can also be used for CIN.

Always consult the manufacturer if there is any question.

The selection of COUT is driven by the required effective

series resistance (ESR). Typically,once the ESR require-

ment is satisfied,the capacitance is adequate for filtering.

The output ripple (∆VOUT) is approximated by:

ΔVOUT ≈IO•VOUT +VD

VIN

+IRIPPLE









•

ESR2+1

2πfCOUT

























LTC1872

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For more information www.linear.com/LTC1872

applicaTions inForMaTion

where f is the operating frequency,COUT is the output

capacitanceand IRIPPLE is the ripple current intheinductor.

Manufacturers such as Nichicon,United Chemicon and

Sanyoshouldbeconsideredforhigh performancethrough-

hole capacitors.The OS-CON semiconductor dielectric

capacitor available from Sanyo has the lowest ESR (size)

product of any aluminum electrolytic at a somewhat higher

price. The output capacitor RMS current is approximately

equal to:

•DC−DC2

where IPK is the peak inductor current and DC is the switch

duty cycle.

When using electrolytic output capacitors,if the ripple and

ESR requirements are met,there is likely to be far more

capacitance than required.

In surface mount applications,multiple capacitors may

have to be paralleled to meet the ESR or RMS current

handling requirements of the application.Aluminum

electrolytic and dry tantalum capacitors are both available

in surface mount configurations.An excellent choice of

tantalum capacitors is the AVX TPS and KEMET T510

series of surface mount tantalum capacitors.Also,

ceramic capacitors in X5R pr X7R dielectrics offer excel-

lent performance.

Low Supply Operation

Although the LTC1872 can function down to approxi-

mately 2.0V, the maximum allowable output current is

reduced when VIN decreases below 3V. Figure 3shows

the amount of change as the supply is reduced down to

2V. Also shown in Figure 3is the effect of VIN on VREF as

VIN goes below 2.3V.

Setting Output Voltage

The LTC1872 develops a 0.8V reference voltage between

the feedback (Pin 3) terminal and ground (see Figure 4).

By selecting resistor R1, a constant current is caused to

flow through R1and R2to set the overall output voltage.

The regulated output voltage is determined by:

VOUT =0.8V 1+R2











INPUT VOLTAGE (V)

2.0

NORMALIZED VOLTAGE (%)

105

100

75 2.2 2.4 2.6 2.8

1872 F03

3.0

VREF

VITH

Figure 4. Setting Output Voltage

Figure 3. Line Regulation of VREF and VITH

VFB

VOUT

LTC1872

1872 F04

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applicaTions inForMaTion

For most applications,an 80k resistor is suggested for

R1. To prevent stray pickup,locate resistors R1and R2

close to LTC1872.

Efficiency Considerations

The efficiency of a switching regulator isequal to the output

power divided by the input power times 100%. It is often

useful to analyze individual losses to determine what is

limiting the efficiency and which change would produce

the most improvement. Efficiency can be expressed as:

Efficiency = 100% – (η1 + η2 + η3 + ...)

where η1, η2, etc.are the individual losses as a percent-

age of input power.

Although all dissipative elements in the circuit produce

losses, four main sources usually account for most of the

losses in LTC1872 circuits:1) LTC1872 DC bias current, 2)

MOSFET gate charge current, 3) I2R losses and 4) voltage

drop of the output diode.

1. The VIN current is the DC supply current,given in the

electrical characteristics,that excludes MOSFET driver

and control currents.VIN current results in a small loss

which increases with VIN.

2. MOSFET gate charge current results from switching

the gate capacitance of the power MOSFET.Each

time a MOSFET gate is switched from low to high to

low again,a packet of charge,dQ,moves from VIN

to ground.The resulting dQ/dt is a current out of VIN

which is typically much larger than the contoller’s DC

supply current.In continuous mode,IGATECHG = f(Qp).

3. I2R losses are predicted from the DC resistances of

the MOSFET,inductor and current sense resistor.

The MOSFET RDS(ON) multiplied by duty cycle times

the average output current squared can be summed

with I2R losses in the inductor ESR in series with the

current sense resistor.

4. The output diode is a major source of power loss at high

currents. The diode loss is calculated by multiplying

the forward voltage by the load current.

5. Transition losses apply to the external MOSFET and

increase at higher operating frequencies and input

voltages. Transition losses can be estimated from:

Transition Loss = 2(VIN)2IIN(MAX)CRSS(f)

Other losses,including CIN and COUT ESR dissipative

losses, and inductor core losses,generally account for

less than 2% total additional loss.

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applicaTions inForMaTion

PC Board Layout Checklist

When laying out the printed circuit board,the following

checklist should be used to ensure proper operation of

the LTC1872. These items are illustrated graphically in

the layout diagram in Figure 5. Check the following in

your layout:

1. The Schottky diode should be closely connected

between the output capacitor and the drain of the

external MOSFET.

2. The (+) plate of CIN should connect to the sense resis-

tor as closely as possible.This capacitor provides AC

current to the inductor.

3. The input decoupling capacitor (0.1µF) should be

connected closely between VIN (Pin 5) and ground

(Pin 2).

4. Connect the end of RSENSE as close to VIN (Pin 5) as

possible. The VIN pin is the SENSE+of the current

comparator.

5. The trace from SENSE–(Pin 4) to the Sense resistor

should be kept short.The trace should connect close

to RSENSE.

6. Keep the switching node NGATE away from sensitive

small signal nodes.

7. The VFB pin should connect directly to the feedback

resistors. The resistive divider R1and R2must be

connected between the (+) plate of COUT and signal

ground.

L1 M1

BOLD LINES INDICATE HIGH CURRENT PATHS

VOUT

VIN

1872 F05

0.1µF

CITH

RITH

CIN

ITH/RUN

LTC1872

GND

VFB

NGATE

VIN

SENSE–

COUT

Figure 5. LTC1872 Layout Diagram (See PC Board Layout Checklist)

Table of contents

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