Texas Instruments TPS568236 User manual
EVM User's Guide: TPS568236EVM
TPS568236 Step-Down Converter Evaluation Module
Description
The TPS568236 is a single, D-CAP3™ control mode,
synchronous buck converter requiring a very low
external component count. TPS568236EVM is a
fully assembled and tested circuit for evaluating the
TPS568236 converter. This EVM operates typical 12-
V input, and provides a 5.1-V output at 8-A.
Features
• 4.5-V to 18-V input voltage range
• 0.6-V to 5.5-V output voltage range
• Support 8-A continuous output current
• Selectable PSM and FCCM mode under light load
• Fast load transient response
Applications
• Digital TV, set-top box, gaming consoles
• Server, storage and networking point-of-load
• Industrial PC and factory automation applications
• Distributed power systems with typical 5-V, 12-V,
15-V input
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TPS568236 Step-Down Converter Evaluation Module 1
Copyright © 2023 Texas Instruments Incorporated
1 Evaluation Module Overview
1.1 Introduction
The TPS568236 evaluation module (EVM) is a single, synchronous buck converter providing 5.1-V at 8-A from a
6-V to 18-V input. This user’s guide describes the TPS568236EVM performance.
Table 1-1. Input Voltage and Output Current Summary
EVM Input Voltage (VIN) Range Output Current (IOUT) Range
TPS568236EVM 6 V to 18 V 0 A to 8 A
This user's guide describes the characteristics, operation, and use of the Texas Instruments TPS568236
evaluation module (EVM). The TPS568236EVM is designed to help user easily evaluate and test the operation
and functionality of the TPS568236. This user's guide includes the following:
• Setup instructions for the hardware
• Printed-circuit board layouts for the EVM
• Schematic diagram
• Bills of material
• Test results for the EVM
1.2 Kit Contents
• One TPS568236EVM board
• EVM disclaimer Read Me
1.3 Specification
A summary of the TPS568236EVM performance specifications is provided in Table 1-2. Specifications are given
for 12-V input voltage and 5.1-V output voltage, unless otherwise noted. The ambient temperature is 25°C for all
measurement, unless otherwise noted.
Table 1-2. TPS568236EVM Performance Specifications Summary
Specifications Test Conditions MIN TYP MAX Unit
VIN Input voltage 6 12 18 V
CH1
Output voltage 5.1 V
Operating frequency VIN = 12 V, IOUT = 8 A 600 kHz
Output current range 0 8 A
Overcurrent limit VIN = 12 V, LOUT = 1.5 µH 11 A
Output ripple voltage VIN = 12 V, IOUT = 8 A 30 mVPP
1.4 Device Information
TPS568236 is the main device on the EVM board. The TPS568236 is a single, D-CAP3™ control mode,
synchronous buck converter requiring a very low external component count. Features include an accurate
reference voltage, fast load transient response, auto-skip mode operation for light load efficiency, FCCM light
load operation with > 25-kHz switching frequency, D-CAP3 control mode with good line, load regulation, and
does not require external compensation.
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2 Hardware
2.1 Input and Output Connections
The TPS568236EVM is provided with input and output connectors and test points as shown in Table 2-1. Test
point TP2 provides a place to monitor the VIN input voltages with TP9 providing a convenient ground reference.
TP5 is used to monitor the output voltage with TP12 as the ground reference.
Table 2-1. Connection and Test Points
Reference
Designator Function
J1 VIN (see Table 1-1 for VIN range)
J2 VOUT, 5.1 V at 8-A maximum
JP1 PG pullup control. Short pin 1 and pin 2 to pull PG up to VCC.
JP2 EN high control. Short pin 1 and pin 2 to connect VIN to pin 1 of JP3.
JP3 EN control. Short pin 1 and pin 2 of JP2 to make EN high.
JP4 Mode control. Float or short pin 2 and pin 3 to set PSM mode. Short pin 2 and
pin 1 to set FCCM mode.
TP1 VIN positive monitor point
TP2 VIN positive test point
TP3 Switch node (SW) test point
TP4 VOUT positive monitor point
TP5 VOUT positive test point
TP6 EN test point
TP7 PG test point
TP8 GND monitor point
TP9 GND test point
TP10 GND monitor point
TP11 Loop test point
TP12 GND test point
TP13 VCC test point
TP14, TP15, TP16 GND test point
2.2 Modifications
The evaluation module is designed to provide access to the features of the TPS568236. Some modifications can
be made to this module.
2.2.1 Output Voltage Setpoint
To change the output voltage of the EVM, change the value of resistor R4 (Rupper) and R6 (Rlower). The value of
R4 and R6 for a specific output voltage can be calculated using Equation 1.
)
R
R
1(6.0V
LOWER
UPPER
OUT u
(1)
2.2.2 Mode Selection
TPS568236 has a MODE pin that can offer two different options of light load performance, as shown in Table
2-2.
Table 2-2. MODE Pin Settings
MODE Pin Light Load Performance
Connect Pin2(MODE) to Pin3(L) of JP4 or leave MODE pin floating PSM
Connect Pin2(MODE) to Pin1(H) of JP4 FCCM
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3 Implementation Results
This section describes how to properly connect, set up, and use the TPS568236EVM. The section also includes
test results typical for the evaluation modules.
3.1 Evaluation Setup
1. Make sure that the jumper at JP2 (Enable High Control) is covered to connect VIN to pin 1 of JP3. Also
make sure JP3 (Enable Control) pin 2 and 3 are covered to shunt EN to GND to disable the output.
2. Apply appropriate input voltage to VIN (J1-1) or TP1 and GND (J1-2) or TP8. Connect a power supply
capable of supplying 8-A to J1 through a pair of 20AWG wires. Note that the board cannot support hot
plug-in. The input lines must be connected between J1 and an external power source first before turning on
the power source.
3. Move the jumper at JP3 (Enable Control) from pin 2 and 3 (EN and OFF) to pin 2 and 1 (EN and ON) and
make sure JP2 pin 1 and pin 2 are covered. Then, the output can be enabled.
4. Apply the loading to VOUT (J2-2) or TP4 and GND (J2-1) or TP10. The load must be connected to J2
through a pair of 20AWG wires. The maximum load current capability is 8 A. Minimize wire lengths to reduce
losses in the wires.
3.2 Test Setup and Results
3.2.1 Start-Up
The following figures show the TPS568236EVM start-up waveform relative to EN.
VOUT=2V/div
PG=5V/div
IL=2A/div
EN=5V/div
Figure 3-1. Start-Up Relative to EN, IOUT = 0.1 A (2ms/div)
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VOUT=2V/div
PG=5V/div
IL=5A/div
EN=5V/div
Figure 3-2. Start-Up Relative to EN, IOUT = 8 A (2ms/div)
3.2.2 Shutdown
The following figures show the TPS568236EVM shutdown waveform relative to EN.
VOUT=2V/div
PG=5V/div
IL=2A/div
EN=5V/div
Figure 3-3. Shutdown Relative to EN, IOUT = 0.1 A (2ms/div)
VOUT=2V/div
PG=5V/div
IL=5A/div
EN=5V/div
Figure 3-4. Shutdown Relative to EN, IOUT = 8 A (2ms/div)
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3.2.3 Output Voltage Ripple
The following images show the TPS568236EVM output voltage ripple.
VOUT=20mV/div (AC coupled)
SW=5V/div
Figure 3-5. TPS568236EVM Output Voltage Ripple, IOUT = 10 mA, PSM Mode (100us/div)
VOUT=20mV/div (AC coupled)
SW=5V/div
Figure 3-6. TPS568236EVM Output Voltage Ripple, IOUT = 10 mA, FCCM Mode (1us/div)
VOUT=20mV/div (AC coupled)
SW=5V/div
Figure 3-7. TPS568236EVM Output Voltage Ripple, IOUT = 8 A (1us/div)
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4 Hardware Design Files
4.1 Schematic
The following image shows the schematic for the TPS568236EVM.
Figure 4-1. TPS568236EVM Schematic Diagram
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4.2 PCB Layout
The following figures show the board layout for the TPS568236EVM. TPS568236EVM is with four layers. The
top layer contains the main power traces for VIN, VOUT, and GND. Also on the top layer are connections for the
pins of the TPS568236 and a large area filled with ground. Most of the signal traces are also located on the top
side. The input decoupling capacitors C4, C5, and C6 are located as close to VIN pins and PGND pins of the IC
as possible. The input and output connectors, test points, and all of the components are located on the top side.
The bottom layer is a ground plane along with signal ground copper fill and the feedback trace from the point of
regulation to the top of the resistor divider network. Two inner layers are ground plane.
Figure 4-2. Top Assembly
Figure 4-3. Top Layer
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4.3 Bill of Materials
The following table displays the TPS568236EVM bill of materials.
Table 4-1. Bill of Materials
Designator Qty Description Part Number Manufacturer(1)
C1, C6 2 CAP, CERM, 0.1 µF, 25 V, ±10%, X5R, 0603 CL10A104KA8NNNC Samsung Electro-
Mechanics
C4, C5 2 CAP, CERM, 10 μF, 35 V, ±10%, X5R, 0805 GRM21BR6YA106KE43L MuRata
C7, C8, C9,
C10 4 CAP, CERM, 22 μF, 10 V, ±20%, X5R, 0805 GRM21BR61A226ME44L MuRata
C12 1 CAP, CERM, 22 pF, 50 V, ±5%, C0G/NP0, 0603 C0603C220J5GACTU Kemet
C13 1 CAP, CERM, 1 μF, 10 V, ±10%, X5R, 0603 C0603C105K8PACTU Kemet
C14 1 CAP, CERM, 0.022 μF, 16 V, ±10%, X7R, 0603 C0603C220J5GACTU Kemet
C15 1 CAP, CERM, 0.01 μF, 16 V, ±10%, X7R, 0603 C0603C103K4RACTU Kemet
D1 1 Diode, Zener, 5.1 V, 200 mW, SOD-323 MMSZ5231BS-7-F Diodes Inc.
H1, H2, H3,
H4 4 Bumpon, Hemisphere, 0.44 × 0.20, Clear SJ-5303 (CLEAR) 3M
J1, J2 2 Terminal Block, 5.08 mm, 2 × 1, Brass, TH ED120/2DS On-Shore Technology
JP1, JP2 2 Header, 100mil, 2 × 1, Gold, TH PBC02SAAN Sullins Connector Solutions
JP3, JP4 2 Header, 100mil, 3 × 1, Tin, TH PEC03SAAN Sullins Connector Solutions
L1 1 Inductor, 1.5 μH, 11 A, 0.0089 Ω, SMD CMLE063T-1R5MS Cyntec
LBL1 1 Thermal Transfer Printable Labels, 1.250" W × 0.250" H
– 10,000 per roll THT-13-457-10 Brady
R1, R5 2 RES, 0, 5%, 0.1 W, 0603 RC0603JR-070RL Yageo
R2 1 RES, 51, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 CRCW060351R0JNEA Vishay-Dale
R3 1 RES, 100 k, 5%, 0.1 W, 0603 CRCW0603100KJNEAC Vishay-Dale
R4 1 RES, 150 k, 1%, 0.1 W, 0603 RC0603FR-07150KL Yageo
R6 1 RES, 20.0 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 ERJ-3EKF2002V Panasonic
R7, R8, R9 3 RES, 20.0 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 CRCW060320K0FKEA Vishay-Dale
SH-JP1, SH-
JP2, SH-JP3,
SH-JP4
4 Shunt, 100 mil, Gold plated, Black SNT-100-BK-G Samtec
TP1, TP4,
TP8, TP10 4 Terminal, Turret, TH, Triple 1598-2 Keystone
TP2, TP3,
TP5, TP6,
TP7, TP11,
TP13
7 Test Point, Miniature, Red, TH 5000 Keystone
TP9, TP12,
TP14, TP15,
TP16
5 Test Point, Miniature, Black, TH 5001 Keystone
U1 1 4.5-V to 18-V Input, 8-A Synchronous Buck Converter TPS568236RJNR Texas Instruments
C2, C3 0 CAP, CERM, 10 μF, 35 V, ±10%, X5R, 0805 GRM21BR6YA106KE43L MuRata
C11 0 CAP, CERM, 22 μF, 10 V, ±20%, X5R, 0805 GRM21BR61A226ME44L MuRata
(1) Unless otherwise noted in the Alternate Part Number or Alternate Manufacturer columns, all parts can be substituted with equivalents.
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