ST STM32F746IGT6 User manual

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Core746I, STM32 MCU Core Board

Model:STM32F746IGT6

User Manual

What's on the Core746I:

1. STM32F746IGT6:the high performance STM32 MCU which features:

Core: Cortex-M7 32-bit RISC + FPU + Chrom-ART graphic accelerator

Feature: single-cycle DSP instructions

Operating Frequency: 216MHz, 462 DMIPS/2.14 DMIPS/MHz

Operating Voltage: 1.7V-3.6V

Package: LQFP176

Memories: 1024kB Flash, 320+16+4kB SRAM

MCU communication Interfaces:

- 6 x SPI, 4 x USART, 4 x UART, 3 x I2S, 4 x I2C

- 2 x CAN, 1 x QUAD-SPI, 1 x DCMI, 2 x SAI

- 1 x FMC, 1 x SDMMC, 14 x TIM , 1xLPTIM

- 1 xLCD-TFT, 1xSPDIFRX, 1xHDMI-CEC

- 1 x USB 2.0 OTG FS

- 1 x USB 2.0 OTG HS (supports external HS PHY through ULPI)

- 1 x 10/100 Ethernet MAC

AD & DA converters: 3 x AD (12-bit); 2 x DA (12-bit)

Debugging/Programming: supports JTAG/SWD interfaces, supports IAP

2. IC42S16400J / IS42S16400J: SDRAM 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT)

3. MIC2075: onboard USB power management device

4. AMS1117-3.3: 3.3V voltage regulator

5. 8M crystal

6. 32.768K crystal, for internal RTC with calibration

7. Reset button

8. VBUS LED

9. Power indicator

10. Power supply switch, powered from 5Vin or USB connection

11. Boot mode selection, for configuring BOOT0 pin

12. JTAG/SWD interface: for debugging/programming

13. USB connector, supports Device and/or Host

14. MCU pins expander, VCC, GND and all the I/O pins are accessible on expansion connectors for

further expansion

15. Power jumper

VBAT: short the jumper to use system power supply, open it to connect external power, such as

battery

VREF: short the jumper to connect VREF+ to VCC, open it to connect VREF+ to other custom pin via

jumper wire

16. OTG jumper

short the jumper when using USB OTG/HOST

open the jumper to disconnect from related I/O port

Note: Core746I provides JTAG/SWD debugging interface, yet does NOT integrate any debugging

function, a debugger is required.

JTAG/SWD interfaces

The figure 1, and 2 show the header pinouts of JTAG/SWD interface

Figure 1. JTAG Header Pinout Figure 2. SWD Header Pinout