Silicon Laboratories C8051F360x-DK User manual

C8051F36x-DK

C8051F36x DEVELOPMENT KIT USER’SGUIDE

1. Kit Contents

The C8051F36x Development Kit contains the following items:

• C8051F360 Target Board

• C8051Fxxx Development Kit Quick-start Guide

• Silicon Laboratories IDE and Product Information CD-ROM. CD content includes:

• Silicon Laboratories Integrated Development Environment (IDE)

• Keil 8051 Development Tools (macro assembler, linker, evaluation ‘C’ compiler)

• Source code examples and register definition files

• Documentation

• C8051F36x Development Kit User’s Guide (this document)

• AC/DC Power Adapter

• USB Debug Adapter (USB to Debug Interface)

• USB Cable

2. Hardware Setup using a USB Debug Adapter

The target board is connected to a PC running the Silicon Laboratories IDE via the USB Debug Adapter as shown

in Figure 1.

1. Connect the USB Debug Adapter to the DEBUG connector on the target board with the 10-pin ribbon cable.

2. Connect one end of the USB cable to the USB connector on the USB Debug Adapter.

3. Connect the other end of the USB cable to a USB Port on the PC.

4. Connect the AC/DC Power Adapter to power jack P2 on the target board.

Notes:

• Use the Reset button in the IDE to reset the target when connected using a USB Debug Adapter.

• Remove power from the target board before removing the ribbon cable from the target board. Connecting or

disconnecting the cable when the devices have power can damage the device and/or the USB Debug

Adapter.

Figure 1. Hardware Setup using a USB Debug Adapter

USB

Cable

USB Debug Adapter

AC/DC

Adapter

Target Board

P1 P3.0 P3.1 RESET

DEBUG

F360

USB

ACTIVE

PWR

POWER

SILICON LABS

www.silabs.com

J14

+3VD

J13

P2.5

PORT_1

PORT_2

PORT_3

PORT_4

PORT_0

J12

SW3.0

P3.3_LED

CTS

RTS

P3.2_LED

SW3.1

P3.0

P0.1

P3.3

P0.2

P3.5

P3.4

P3.2

P3.1

P1_PWR

SER_PWR

VBUS

REG_IN

J15

J16

J10J11

C8051F360 TB

R10

Silicon Laboratories

USB DEBUG ADAPTER

Run

StopPower

C8051F36x-DK

2 Rev. 0.1

3. Software Setup

The included CD-ROM contains the Silicon Laboratories Integrated Development Environment (IDE), Keil software

8051 tools and additional documentation. Insert the CD-ROM into your PC’s CD-ROM drive. An installer will

automatically launch, allowing you to install the IDE software or read documentation by clicking buttons on the

Installation Panel. If the installer does not automatically start when you insert the CD-ROM, run autorun.exe found

in the root directory of the CD-ROM. Refer to the readme.txt file on the CD-ROM for the latest information

regarding known IDE problems and restrictions.

3.1. USB to UART Drivers Installation

These drivers are necessary for the software to communicate with the board over the USB connection. To install

the USB-to-UART drivers:

1. Connect the development kit board to the PC with the included USB cable.

2. When the PC detects the new device it will open a "Found New Hardware Wizard" window.

3. Press "Next" after selecting the (Recommended) option.

4. Windows Logo testing warnings may appear. Press the "Continue Anyway" button.

5. Press "Finish" to finish installing the "CP210x USB Composite Device".

6. Repeat steps 2 to 5 to install the "CP210x USB Bridge Controller".

The driver can also be installed by going to the directory where the driver was installed and running the following

executable:

PreInstaller.exe

4. Silicon Laboratories Integrated Development Environment

The Silicon Laboratories IDE integrates a source-code editor, source-level debugger and in-system Flash

programmer. The use of third-party compilers and assemblers is also supported. This development kit includes the

Keil Software A51 macro assembler, BL51 linker and evaluation version C51 ‘C’ compiler. These tools can be used

from within the Silicon Laboratories IDE.

4.1. System Requirements

The Silicon Laboratories IDE requirements:

• Pentium-class host PC running Windows 2000 or Windows XP.

• One available COM or USB port.

• 64 MB RAM and 40 MB free HD space recommended.

4.2. Assembler and Linker

A full-version Keil A51 macro assembler and BL51 banking linker are included with the development kit and are

installed during IDE installation. The complete assembler and linker reference manual can be found under the Help

menu in the IDE or in the “SiLabs\MCU\hlp” directory (A51.pdf).

4.3. Evaluation C51 ‘C’ Compiler

An evaluation version of the Keil C51 ‘C’ compiler is included with the development kit and is installed during IDE

installation. The evaluation version of the C51 compiler is the same as the full professional version except code

size is limited to 4 kB and the floating point library is not included. The C51 compiler reference manual can be

found under the Help menu in the IDE or in the “SiLabs\MCU\hlp” directory (C51.pdf).

4.4. Using the Keil Software 8051 Tools with the Silicon Laboratories IDE

To perform source-level debugging with the IDE, you must configure the Keil 8051 tools to generate an absolute

object file in the OMF-51 format with object extensions and debug records enabled. You may build the OMF-51

absolute object file by calling the Keil 8051 tools at the command line (e.g. batch file or make file) or by using the

project manager built into the IDE. The default configuration when using the Silicon Laboratories IDE project

manager enables object extension and debug record generation.

Refer to Application Note “

AN104:

Integrating

C8051F36x-DK

Rev. 0.1 3

Keil 8051 Tools Into the Silicon Labs IDE”

in the “SiLabs\MCU\Documentation\Appnotes” directory on the CD-

ROM for additional information on using the Keil 8051 tools with the Silicon Laboratories IDE.

To build an absolute object file using the Silicon Laboratories IDE project manager, you must first create a project.

A project consists of a set of files, IDE configuration, debug views, and a target build configuration (list of files and

tool configurations used as input to the assembler, compiler, and linker when building an output object file).

The following sections illustrate the steps necessary to manually create a project with one or more source files,

build a program and download the program to the target in preparation for debugging. (The IDE will automatically

create a single-file project using the currently open and active source file if you select Build/Make Project before a

project is defined.)

4.4.1. Creating a New Project

1. Select Project→New Project to open a new project and reset all configuration settings to default.

2. Select File→New File to open an editor window. Create your source file(s) and save the file(s) with a rec-

ognized extension, such as .c, .h, or .asm, to enable color syntax highlighting.

3. Right-click on “New Project” in the Project Window. Select Add files to project. Select files in the file

browser and click Open. Continue adding files until all project files have been added.

4. For each of the files in the

Project

Window

that you want assembled, compiled and linked into the target

build, right-click on the file name and select

Add file to build

. Each file will be assembled or compiled as

appropriate (based on file extension) and linked into the build of the absolute object file.

Note:

If a project contains a large number of files, the “Group” feature of the IDE can be used to organize.

Right-click on “New Project” in the

Project Window

. Select

Add Groups to project

. Add pre-defined

groups or add customized groups. Right-click on the group name and choose

Add file to group

. Select files

to be added. Continue adding files until all project files have been added.

4.4.2. Building and Downloading the Program for Debugging

1. Once all source files have been added to the target build, build the project by clicking on the Build/Make

Project button in the toolbar or selecting Project→Build/Make Project from the menu.

Note: After the project has been built the first time, the Build/Make Project command will only build the

files that have been changed since the previous build. To rebuild all files and project dependencies, click

on the Rebuild All button in the toolbar or select Project→Rebuild All from the menu.

Before connecting to the target device, several connection options may need to be set.

Open the

Connection Options

window by selecting

Options

→

Connection Options...

in the IDE menu. First, select

the appropriate adapter in the “Serial Adapter” section. Next, the correct “Debug Interface” must be selected.

C8051F36x

family devices use the Silicon Labs 2-wire (C2) debug interface. Once all the selections are

made, click the OK button to close the window.

3. Click the

Connect

button in the toolbar or select

Debug

→

Connect

from the menu to connect to the device.

4. Download the project to the target by clicking the Download Code button in the toolbar.

Note: To enable automatic downloading if the program build is successful select Enable automatic con-

nect/download after build in the Project→Target Build Configuration dialog. If errors occur during the

build process, the IDE will not attempt the download.

5. Save the project when finished with the debug session to preserve the current target build configuration,

editor settings and the location of all open debug views. To save the project, select Project→Save Project

As... from the menu. Create a new name for the project and click on Save.

C8051F36x-DK

4 Rev. 0.1

5. Example Source Code

Example source code and register definition files are provided in the “SiLabs\MCU\Examples\C8051F36x”

directory during IDE installation. These files may be used as a template for code development. Example

applications include a blinking LED example which configures the green LED on the target board to blink at a fixed

rate.

5.1. Register Definition Files

status bits. They are installed into the “SiLabs\MCU\Examples\C8051F36x” directory during IDE installation. The

also installed in the default search path used by the Keil Software 8051 tools. Therefore, when using the Keil 8051

tools included with the development kit (A51, C51), it is not necessary to copy a register definition file to each

project’s file directory.

5.2. Blinking LED Example

The example source files blink.asm and blinky.c show examples of several basic C8051F36x functions. These

include: disabling the watchdog timer (WDT), configuring the Port I/O crossbar, configuring a timer for an interrupt

routine, initializing the system clock, and configuring a GPIO port. When compiled/assembled and linked this

program flashes the green LED on the C8051F360 target board about five times a second using the interrupt

handler with a timer.

C8051F36x-DK

Rev. 0.1 5

6. Target Board

The C8051F36x Development Kit includes a target board with a C8051F360 device pre-installed for evaluation and

preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping

using the target board. Refer to Figure 2 for the locations of the various I/O connectors.

P1 96-pin female connector

P2 Power connector (accepts input from 7 to 15 VDC unregulated power adapter)

P3 Analog I/O terminal block

P4 USB connector (for CP2102 USB-to-UART bridge)

J1 Power supply header (Selects power from the USB Debug Adapter, P1 Power Adapter, or

USB power if P4 is connected. Only one power option should be selected at one time.)

J2 Port 0 header

J3 Port 1 header

J4 Port 2 header

J5 Port 3 header

J6 Port 4 header

J7 Connects the +3 V supply net to the VDD supply net

J8 Supply signal header

J9 Debug connector for debug adapter interface

J10, J11 External crystal port pin enable connectors

J12 Port I/O jumper configuration block

J13 Jumper connection for potentiometer to pin 2.5

J14 Jumper connection for potentiometer source to +3 V

J15 Jumper connection for pin 0.3 to capacitors (used when VREF is internally generated)

J16 Jumper connection for pin 0.4 to resistor/capacitor (used to convert IDAC output to a voltage)

J18 Connects the +3 V supply net to the AV+ supply net

Figure 2. C8051F360 Target Board

P1 P3.0 P3.1 RESET

DEBUG

F360

USB

ACTIVE

PWR

POWER

SILICON LABS

www.silabs.com

J14

+3VD

J13

P2.5

PORT_1

PORT_2

PORT_3

PORT_4

PORT_0

J12

SW3.0

P3.3_LED

CTS

RTS

P3.2_LED

SW3.1

P3.0

P0.1

P3.3

P0.2

P3.5

P3.4

P3.2

P3.1

P1_PWR

SER_PWR

VBUS

REG_IN

J15

J16

J10J11

C8051F360 TB

SA-TB52PCB

R10

GNDGND

VDD

VBUS

AV+

+3VD

P0.3

P0.4

VREF

IDAC

P3.2

P3.3

C8051F36x-DK

6 Rev. 0.1

6.1. System Clock Sources

The C8051F360 device installed on the target board features a calibrated programmable internal oscillator which is

enabled as the system clock source on reset. After reset, the internal oscillator operates at a frequency of

3.0625 MHz (±1.5%) by default but may be configured by software to operate at other frequencies. Therefore, in

many applications an external oscillator is not required. However, if you wish to operate the C8051F360 device at a

frequency not available with the internal oscillator, an external crystal may be used. Refer to the C8051F36x data

sheet for more information on configuring the system clock source.

The target board is designed to facilitate the installation of an external crystal. Remove shorting blocks at headers

J10 and J11 and install the crystal at the pads marked Y1. Install a 10 MΩresistor at R1 and install capacitors at

C20 and C19 using values appropriate for the crystal you select. Refer to the C8051F36x data sheet for more

information on the use of external oscillators.

6.2. Switches and LEDs

Three switches are provided on the target board. Switch RESET is connected to the RESET pin of the C8051F360.

Pressing RESET puts the device into its hardware-reset state. Switches P3.0 and P3.1 are connected to the

C8051F360’s general purpose I/O (GPIO) pins through headers. Pressing P3.0 or P3.1 generates a logic low

signal on the port pin. Remove the shorting blocks from the J12 header to disconnect Switch P3.0 and Switch P3.1

from the port pins. See Table 1 for the port pins and headers corresponding to each switch.

Four LEDs are also provided on the target board. The red LED labeled PWR is used to indicate a power

connection to the target board. The green surface-mount LEDs labeled with port pin names are connected to the

C8051F360’s GPIO pins through headers. Remove the shorting blocks from the header to disconnect the LEDs

from the port pin. The USB ACTIVE red LED indicates when the CP210x USB-to-UART bridge (U3) on the board is

receiving power from the USB bus and is properly enumerated (i.e. drivers are installed and a USB cable is

connected to P4). See Table 1 for the port pins and headers corresponding to each LED.

Also included on the C8051F360 target board is a 10 KΩthumb-wheel rotary potentiometer, part number R10. The

potentiometer is connected to the C8051F360’s P2.5 pin through the J13 header. Remove the shorting block from

the header to disconnect the potentiometer from the port pin. See Table 1 for the port pin and header

corresponding to the potentiometer.

Table 1. Target Board I/O Descriptions

Description I/O Header

SW1 Reset none

SW2 P3.0 J12[1–2]

SW3 P3.1 J12[3–4]

Green LED P3.2 J12[5–6]

Green LED P3.3 J12[7–8]

Red LED PWR none

Red LED USB ACTIVE none

Potentiometer P2.5 J13

C8051F36x-DK

Rev. 0.1 7

6.3. PORT I/O Connectors (J2 - J6)

In addition to all port I/O signals being routed to the 96-pin expansion connector, each of the five parallel ports of

the C8051F360 has its own 10-pin header connector. Each connector provides a pin for the corresponding port

pins 0–7, +3.3 VDC and digital ground. Table 3 defines the pins for the port connectors, where Pn represents P0

through P4. The same pin-out order is used for all of the port connectors.

6.4. Target Board DEBUG Interface (J9)

The

DEBUG

connector (J9) provides access to the

DEBUG

(C2) pins of the C8051F360. It is used to connect the

Serial Adapter or the USB Debug Adapter to the target board for in-circuit debugging and Flash programming.

Table 3 shows the

DEBUG

pin definitions.

Table 2. J12–J19 Port Connector Pin Descriptions

Pin # Description

1Pn.0

2Pn.1

3Pn.2

4Pn.3

5Pn.4

6Pn.5

7Pn.6

8 Pn.7 (not connected for J6)

9 +3VD(+3.3VDC)

10 GND (Ground)

Table 3. DEBUG Connector Pin Descriptions

Pin # Description

1 +3VD(+3.3VDC)

2, 3, 9 GND (Ground)

4C2D

5/RST(Reset)

6P4.6

7C2CK

8 Not Connected

10 USB Power (from USB Debug Adapter)

C8051F36x-DK

8 Rev. 0.1

6.5. USB to Serial Connector (P1)

A USB-to-Serial bridge interface is provided. A USB B-type connector (P1), a Silicon Laboratories CP2102 USB-to-

UART Bridge, and related circuits are provided to facilitate the serial connection between a PC and the C8051F360

microcontroller on the target board. The RX, TX, CTS and RTS signals of the UART side of the Bridge (CP2102)

may be connected to the microcontroller by installing shorting blocks on J12 as follows:

6.6. Analog I/O (P2)

Several of the C8051F360 target device’s port pins are connected to the P3 terminal block. Refer to Table 5 for the

P3 terminal block connections.

6.7. Power Connector (J1)

The Target Board can be powered from three different sources: 1) The regulator input from the P2 9 V DC Power

Adapter, 2) The 5 V VBUS signal if P4 is connected to a USB bus, and 3) The 5 V USB bus if a USB Debug

Adapter is connected to the Debug Header (J9). Place a shorting block at header J1[REG_IN-P1_PWR] to power

the board directly from an AC/DC Power Adapter. Place a shorting block at header J1[REG_IN-VBUS] to power the

board from the USB bus connected to P4. Place a shorting block at header J1[REG_IN-SER_PWR] to power the

board from the USB Debug Adapter. Please note that the second option is not supported if a USB bus is not

connected to P4 and the third option is not supported with either the EC1 or EC2 Serial Adapters.

Note: Only one power option should be selected at one time.

Table 4. UART Connections (J12)

Connection Signals

J12[9–10] P0.1 to TX_MC

J12[11–12] P0.2 to RX_MC

J12[13–14] P3.4 to RTS

J12[15–16] P3.5 to CTS

Table 5. J6 Terminal Block Pin Descriptions

Pin # Description

1 P2.3/AIN2.3/CP0+

2 P2.4/AIN2.4/CP0–

3 GND (Ground)

4 P0.3/VREF (Voltage Reference)

5P0.4/IDAC

C8051F36x-DK

Rev. 0.1 9

7. Schematics

Figure 3. C8051F360 Target Board Schematic (Page 1 of 2)

C8051F36x-DK

10 Rev. 0.1

Figure 4. C8051F360 Target Board Schematic (Page 2 of 2)

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