NXP Semiconductors LPC21 Series User manual

UM10114

LPC21xx and LPC22xx User manual

Rev. 03 — 2 April 2008 User manual

Document information

Info Content

Keywords LPC2109/00, LPC2109/01, LPC2119, LPC2119/01, LPC2129,

LPC2129/01, LPC2114, LPC2114/01, LPC2124, LPC2124/01, LPC2194,

LPC2194/01, LPC2210, LPC2220, LPC2210/01, LPC2212, LPC2212/01,

LPC2214, LPC2214/01, LPC2290, LPC2290/01, LPC2292, LPC2292/01,

LPC2294, LPC2294/01, ARM, ARM7, 32-bit, Microcontroller

Abstract User manual for LPC2109/19/29/14/24/94 and

LPC2210/20/12/14/90/92/94 including /01 parts

User manual Rev. 03 — 2 April 2008 2 of 386

Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: [email protected]

NXP Semiconductors UM10114

LPC21xx and LPC22xx

Revision history

Rev Date Description

3.0 20080402 •Flash chapter updated with correct boot process flowchart.

•The Reinvoke ISP command has been removed from the ISP command description

because it is not implemented in the LPC21xx/LPC22xx.

•Description of CRP levels has been corrected, and CRP description for different

bootloader code versions has been added.

•Numbering of CAN controllers in the global CAN filter look-up table has been corrected

for /01 devices.

•Part ID’s have been updated for LPC2210/20 parts.

2.0 20080104 Integrated related parts into this manual and made numerous editorial and content updates

throughout the document:

•The format of this data sheet has been redesigned to comply with the new identity

guidelines of NXP Semiconductors.

•Legal texts have been adapted to the new company name where appropriate.

•Parts LPC2109, LPC2119, LPC2129, LPC2114, LPC2124, LPC2194, LPC2212,

LPC2214, LPC2290, LPC2292, LPC2294 and /01 parts added.

•PWM mode description updated.

•Fractional baud rate generator updated.

•CTCR register updated.

•ADC pin description updated.

•SPI clock conditions updated.

•JTAG pin description updated.

•Startup sequence diagram added.

•SPI master mode: SPI SSEL line conditioning for LPC2210/20 added in SPI pin

description table.

1.0 20051012 Moved the UM document into the new structured FrameMaker template. Many changes

were made to the format throughout the document. Here are the most important:

•UART0 and UART1 description updated (fractional baudrate generator and hardware

handshake features added - auto-CTS/RTS)

•ADC chapter updated with the dedicated result registers

•GPIO chapter updated with the description of the Fast IOs

User manual Rev. 03 — 2 April 2008 3 of 386

1. Introduction

The LPC21xx and LPC22xx are based on a 16/32 bit ARM7TDMI-STM CPU with real-time

emulation and embedded trace support, together with 64/128/256 kilobytes (kB) of

embedded high speed flash memory. A 128-bit wide internal memory interface and a

unique accelerator architecture enable 32-bit code execution at maximum clock rate. For

critical code size applications, the alternative 16-bit Thumb Mode reduces code by more

than 30% with minimal performance penalty.

With their compact 64 and 144 pin packages, low power consumption, various 32-bit

timers, up to 12external interrupt pins, and four channel 10-bit ADC and 46 GPIOs (64 pin

packages), or 8-channel 10-bit ADC and 112 GPIOs (144 pin package), these

microcontrollers are particularly targeted for industrial control, medical systems, access

control, and point-of-sale. With a wide range of serial communications interfaces, they are

also very well suited for communication gateways, protocol converters, and embedded soft

modems as well as many other general-purpose applications.

2. How to read this manual

The LPC21xx and LPC22xx user manual covers the following parts and versions:

•LPC2109, LPC2119, LPC2129, /00 and /01 versions

•LPC2114, LPC2124, /00 and /01 versions

•LPC2194 and LPC2194/01

•LPC2210, LPC2210/01, and LPC2220

•LPC2212, LPC2214, /00 and /01 versions

•LPC2290 and LPC2290/01

•LPC2292, LPC2294, /00 and /01 versions

All parts exist in legacy versions and enhanced versions. Enhanced parts are equipped

with enhanced GPIO, SSP, ADC, UART, and timer peripherals. They are also backward

compatible to the “legacy” parts containing legacy versions of the same peripherals.

Therefore, enhanced parts contain all features of legacy parts as well. See Table 1–16 for

an overview.

To denote different versions the following suffixes are used (see Section 1–4 “Ordering

options”); no suffix, /00, /01, and /G. All /01 versions and the LPC2220 (no suffix) contain

enhanced features.

UM10114

Chapter 1: Introductory information

Rev. 03 — 2 April 2008 User manual

User manual Rev. 03 — 2 April 2008 4 of 386

NXP Semiconductors UM10114

Chapter 1: Introductory information

This user manual describes enhanced features together with legacy features for all

LPC21xx and LPC22xx parts. Part specific and legacy/enhanced specific pinning,

registers, and configurations are listed in a table at the beginning of each chapter (see for

example Table 6–52 “LPC21xx/22xx part-specific register bits”). Use this table to

determine which parts of the user manual apply.

3. Features

3.1 Legacy features common to all LPC21xx and LPC22xx parts

•16-bit/32-bit ARM7TDMI-S microcontroller in a 64 or 144 pin package.

•8/16/64 kB of on-chip static RAM and 64/128/256 kB of on-chip flash program

memory (except for flashless LPC2210/20/90). 128-bit wide interface/accelerator

enables high-speed 60 MHz operation.

•Diversified Code Read Protection (CRP) enables different security levels to be

implemented.

In-System/In-Application Programming (ISP/IAP) via on-chip boot loader software.

Single flash sector or full chip erase in 100 ms and programming of 256 bytes in 1 ms.

•External 8, 16, or 32-bit bus (144 pin package).

•EmbeddedICE RT and Embedded Trace offer real-time debugging with the on-chip

RealMonitor software and high speed tracing of instruction execution.

•Up to four interconnected CAN interfaces with advanced acceptance filters.

•10-bit A/D converter providing four/eight analog inputs with conversion times as low

as 2.44 ms per channel and dedicated result registers to minimize interrupt overhead.

•Two 32-bit timers/external event counters with four capture and four compare

channels each, PWM unit (6 outputs), Real Time Clock (RTC), and watchdog.

•Multiple serial interfaces including two UARTs (16C550), a fast I2C-bus (400 kbit/s),

and two SPI interfaces.

•Vectored interrupt controller with configurable priorities and vector addresses.

•Up to forty-eight 5 V tolerant fast general purpose I/O pins.

Table 1. LPC21xx and LPC22xx legacy/enhanced parts overview

Legacy parts Enhanced parts

LPC2109/00

LPC2119, LPC2119/00

LPC2129, LPC2129/00

LPC2109/01

LPC2119/01

LPC2129/01

LPC2114, LPC2114/00

LPC2124, LPC2124/00 LPC2114/01

LPC2124/01

LPC2194, LPC2194/00 LPC2194/01

LPC2210 LPC2210/01

LPC2220, LPC2220/G

LPC2212, LPC2212/00

LPC2214, LPC2214/00 LPC2212/01

LPC2214/01

LPC2290 LPC2290/01

LPC2292, LPC2292/00

LPC2294, LPC2294/00 LPC2292/01

LPC2294/01

User manual Rev. 03 — 2 April 2008 5 of 386

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Chapter 1: Introductory information

•Up to 12 edge or level sensitive external interrupt pins available.

•60 MHz maximum CPU clock available from programmable on-chip PLL with a

possible input frequency of 10 MHz to 25 MHz and a settling time of 100 ms.

•For flashless LPC2210/20/90 only: 60 MHz (LPC2210/90), 72 MHz (LPC2290/01), or

75 MHz (LPC2210/01 and LPC2220) maximum CPU clock available from

programmable on-chip Phase-Locked Loop (PLL) with settling time of 100 μs.

•On-chip integrated oscillator operates with an external crystal in the range from

1 MHz to 25 MHz and with an external oscillator up to 50 MHz.

•Two power saving modes, Idle mode and Power-down mode.

•Peripheral clock scaling and individual enable/disable of peripheral functions for

additional power optimization.

•Processor wake-up from Power-down mode via external interrupt or CAN controllers.

•Dual power supply:

–CPU operating voltage range of 1.65 V to 1.95 V (1.8 V ± 8.3 %).

–I/O power supply range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O pads.

3.2 Enhanced features

•Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original

device. They also allow for a port pin to be read at any time regardless of its function.

•Dedicated result registers for ADC reduce interrupt overhead. The ADC pads are 5 V

tolerant when configured for digital I/O function(s).

•UART0/1 include fractional baud rate generator, auto-bauding capabilities, and

handshake flow-control fully implemented in hardware.

•Buffered SSP serial controller supporting SPI, 4-wire SSI, and Microwire formats.

•SPI programmable data length and master mode enhancement.

•General purpose timers can operate as external event counters.

4. Ordering options

4.1 LPC2109/2119/2129

Table 2. LPC2109/2119/2129 Ordering information

Type number Package

Name Description Version

LPC2109FBD64/00 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2109FBD64/01 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2119FBD64 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2119FBD64/00 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2119FBD64/01 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

User manual Rev. 03 — 2 April 2008 6 of 386

NXP Semiconductors UM10114

Chapter 1: Introductory information

4.2 LPC2114/2124

LPC2129FBD64 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2129FBD64/00 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2129FBD64/01 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

Table 3. LPC2109/2119/2129 Ordering options

Type number Flash

memory RAM CAN Fast GPIO/

SSP/

Enhanced

UART, ADC,

Timer

Temperature range

LPC2109FBD64/00 64 kB 8 kB 1 channel no −40 °C to +85 °C

LPC2109FBD64/01 64 kB 8 kB 1 channel yes −40 °C to +85 °C

LPC2119FBD64 128 kB 16 kB 2 channels no −40 °C to +85 °C

LPC2119FBD64/00 128 kB 16 kB 2 channels no −40 °C to +85 °C

LPC2119FBD64/01 128 kB 16 kB 2 channels yes −40 °C to +85 °C

LPC2129FBD64 256 kB 16 kB 2 channels no −40 °C to +85 °C

LPC2129FBD64/00 256 kB 16 kB 2 channels no −40 °C to +85 °C

LPC2129FBD64/01 256 kB 16 kB 2 channels yes −40 °C to +85 °C

Table 2. LPC2109/2119/2129 Ordering information …continued

Type number Package

Name Description Version

Table 4. LPC 2114/2124 Ordering information

Type number Package

Name Description Version

LPC2114FBD64 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2114FBD64/00 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2114FBD64/01 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2124FBD64 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2124FBD64/00 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2124FBD64/01 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

User manual Rev. 03 — 2 April 2008 7 of 386

NXP Semiconductors UM10114

Chapter 1: Introductory information

4.3 LPC2194

4.4 LPC2210/2220

Table 5. LPC2114/2124 Ordering options

Type number Flash

memory RAM Fast GPIO/SSP/

Enhanced

UART, ADC,

Timer

Temperature range

LPC2114FBD64 128 kB 16 kB no −40 °C to +85 °C

LPC2114FBD64/00 128 kB 16 kB no −40 °C to +85 °C

LPC2114FBD64/01 128 kB 16 kB yes −40 °C to +85 °C

LPC2124FBD64 256 kB 16 kB no −40 °C to +85 °C

LPC2124FBD64/00 256 kB 16 kB no −40 °C to +85 °C

LPC2124FBD64/01 256 kB 16 kB yes −40 °C to +85 °C

Table 6. LPC2194 Ordering information

Type number Package

Name Description Version

LPC2194HBD64 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2194HBD64/00 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

LPC2194HBD64/01 LQFP64 plastic low profile quad flat package; 64 leads;

body 10 ×10 ×1.4 mm SOT314-2

Table 7. LPC2194 Ordering options

Type number Flash

memory RAM CAN Fast GPIO/

SSP/

Enhanced

UART, ADC,

Timer

Temperature range

LPC2194HBD64 256 kB 16 kB 4 channels no −40 °C to +125 °C

LPC2194HBD64/00 256 kB 16 kB 4 channels no −40 °C to +125 °C

LPC2194HBD64/01 256 kB 16 kB 4 channels yes −40 °C to +125 °C

Table 8. LPC2210/2220 Ordering information

Type number Package

Name Description Version

LPC2210FBD144 LQFP144 plastic low profile quad flat package; 144

leads; body 20 ×20 ×1.4 mm SOT486-1

LPC2210FBD144/01 LQFP144 plastic low profile quad flat package; 144

leads; body 20 ×20 ×1.4 mm SOT486-1

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NXP Semiconductors UM10114

Chapter 1: Introductory information

4.5 LPC2212/2214

LPC2220FBD144 LQFP144 plastic low profile quad flat package; 144

leads; body 20 ×20 ×1.4 mm SOT486-1

LPC2220FET144 TFBGA144 plastic thin fine-pitch ball grid array package;

144 balls; body 12 ×12 ×0.8 mm SOT569-1

LPC2220FET144/G TFBGA144 plastic thin fine-pitch ball grid array package;

144 balls; body 12 ×12 ×0.8 mm SOT569-1

Table 9. LPC2210/2220 Ordering options

Type number RAM Fast GPIO/

SSP/

Enhanced

UART, ADC,

Timer

Temperature range

LPC2210FBD144 16 kB no −40 °C to +85 °C

LPC2210FBD144/01 16 kB yes −40 °C to +85 °C

LPC2220FBD144 64 kB yes −40 °C to +85 °C

LPC2220FET144 64 kB yes −40 °C to +85 °C

LPC2220FET144/G 64 kB yes −40 °C to +85 °C

Table 8. LPC2210/2220 Ordering information …continued

Type number Package

Name Description Version

Table 10. LPC2212/2214 Ordering information

Type number Package

Name Description Version

LPC2212FBD144 LQFP144 plastic low profile quad flat package; 144 leads;

body 20 ×20 ×1.4 mm SOT486-1

LPC2212FBD144/00 LQFP144 plastic low profile quad flat package; 144 leads;

body 20 ×20 ×1.4 mm SOT486-1

LPC2212FBD144/01 LQFP144 plastic low profile quad flat package; 144 leads;

body 20 ×20 ×1.4 mm SOT486-1

LPC2214FBD144 LQFP144 plastic low profile quad flat package; 144 leads;

body 20 ×20 ×1.4 mm SOT486-1

LPC2214FBD144/00 LQFP144 plastic low profile quad flat package; 144 leads;

body 20 ×20 ×1.4 mm SOT486-1

LPC2214FBD144/01 LQFP144 plastic low profile quad flat package; 144 leads;

body 20 ×20 ×1.4 mm SOT486-1

User manual Rev. 03 — 2 April 2008 9 of 386

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Chapter 1: Introductory information

4.6 LPC2290

4.7 LPC2292/2294

Table 11. LPC2212/2214 Ordering options

Type number Flash memory RAM Fast GPIO/

SSP/

Enhanced

UART, ADC,

Timer

Temperature range

LPC2212FBD144 128 kB 16 kB no −40 °C to +85 °C

LPC2212FBD144/00 128 kB 16 kB no −40 °C to +85 °C

LPC2212FBD144/01 128 kB 16 kB yes −40 °C to +85 °C

LPC2214FBD144 256 kB 16 kB no −40 °C to +85 °C

LPC2214FBD144/00 256 kB 16 kB no −40 °C to +85 °C

LPC2214FBD144/01 256 kB 16 kB yes −40 °C to +85 °C

Table 12. LPC2290 Ordering information

Type number Package

Name Description Version

LPC2290FBD144 LQFP144 plastic low profile quad flat package;

144 leads; body 20 ×20 ×1.4 mm SOT486-1

LPC2290FBD144/01 LQFP144 plastic low profile quad flat package;

144 leads; body 20 ×20 ×1.4 mm SOT486-1

Table 13. LPC2290 Ordering options

Type number RAM CAN Enhancements Temperature range

LPC2290FBD144 16 kB 2 channels None −40 °C to +85 °C

LPC2290FBD144/01 64 kB 2 channels Higher CPU clock, more

on-chip SRAM, Fast I/Os,

improved UARTs, added SSP,

upgraded ADC

−40 °C to +85 °C

Table 14. LPC2292/2294 Ordering information

Type number Package

Name Description Version

LPC2292FBD144 LQFP144 plastic low profile quad flat package;

144 leads; body 20 ×20 ×1.4 mm SOT486-1

LPC2292FBD144/00 LQFP144 plastic low profile quad flat package;

144 leads; body 20 ×20 ×1.4 mm SOT486-1

LPC2292FBD144/01 LQFP144 plastic low profile quad flat package;

144 leads; body 20 ×20 ×1.4 mm SOT486-1

LPC2292FET144/00 TFBGA144 plastic thin fine-pitch ball grid array package;

144 balls; body 12 ×12 ×0.8 mm SOT569-1

LPC2292FET144/01 TFBGA144 plastic thin fine-pitch ball grid array package;

144 balls; body 12 ×12 ×0.8 mm SOT569-1

LPC2292FET144/G TFBGA144 plastic thin fine-pitch ball grid array package;

144 balls; body 12 ×12 ×0.8 mm SOT569-1

User manual Rev. 03 — 2 April 2008 10 of 386

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Chapter 1: Introductory information

LPC2294HBD144 LQFP144 plastic low profile quad flat package;

144 leads; body 20 ×20 ×1.4 mm SOT486-1

LPC2294HBD144/00 LQFP144 plastic low profile quad flat package;

144 leads; body 20 ×20 ×1.4 mm SOT486-1

LPC2294HBD144/01 LQFP144 plastic low profile quad flat package;

144 leads; body 20 ×20 ×1.4 mm SOT486-1

Table 15. LPC2292/2294 Ordering options

Type number Flash

memory RAM CAN Fast GPIO/

SSP/

Enhanced

UART, ADC,

Timer

Temperature range

LPC2292FBD144 256 kB 16 kB 2 channels no −40 °C to +85 °C

LPC2292FBD144/00 256 kB 16 kB 2 channels no −40 °C to +85 °C

LPC2292FBD144/01 256 kB 16 kB 2 channels yes −40 °C to +85 °C

LPC2292FET144/00 256 kB 16 kB 2 channels no −40 °C to +85 °C

LPC2292FET144/01 256 kB 16 kB 2 channels yes −40 °C to +85 °C

LPC2292FET144/G 256 kB 16 kB 2 channels no −40 °C to +85 °C

LPC2294HBD144 256 kB 16 kB 4 channels no −40 °C to +125 °C

LPC2294HBD144/00 256 kB 16 kB 4 channels no −40 °C to +125 °C

LPC2294HBD144/01 256 kB 16 kB 4 channels yes −40 °C to +125 °C

Table 14. LPC2292/2294 Ordering information …continued

Type number Package

Name Description Version

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