Atmel ATmega32M1 User manual

Features

•High Performance, Low Power AVR 8-bit Microcontroller

•Advanced RISC Architecture

– 131 Powerful Instructions - Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Fully Static Operation

– Up to 1MIPS throughput per MHz

– On-chip 2-cycle Multiplier

•Data and Non-Volatile Program Memory

– 16K/32K/64K Bytes Flash of In-System Programmable Program Memory

• Endurance: 10,000 Write/Erase Cycles

– Optional Boot Code Section with Independent Lock Bits

– In-System Programming by On-chip Boot Program

• True Read-While-Write Operation

– 512/1024/2048 Bytes of In-System Programmable EEPROM

• Endurance: 100,000 Write/Erase Cycles

•Programming Lock for Flash Program and EEPROM Data Security

•1024/2048/4096 Bytes Internal SRAM

•On Chip Debug Interface (debugWIRE)

•CAN 2.0A/B with 6 Message Objects - ISO 16845 Certified (1)

•LIN 2.1 and 1.3 Controller or 8-Bit UART

•One 12-bit High Speed PSC (Power Stage Controller) (only ATmega16/32/64M1)

• Non Overlapping Inverted PWM Output Pins With Flexible Dead-Time

• Variable PWM duty Cycle and Frequency

• Synchronous Update of all PWM Registers

• Auto Stop Function for Emergency Event

•Peripheral Features

– One 8-bit General purpose Timer/Counter with Separate Prescaler, Compare Mode

and Capture Mode

– One 16-bit General purpose Timer/Counter with Separate Prescaler, Compare

Mode and Capture Mode

– One Master/Slave SPI Serial Interface

– 10-bit ADC

• Up To 11 Single Ended Channels and 3 Fully Differential ADC Channel Pairs

• Programmable Gain (5x, 10x, 20x, 40x) on Differential Channels

• Internal Reference Voltage

• Direct Power Supply Voltage Measurement

– 10-bit DAC for Variable Voltage Reference (Comparators, ADC)

– Four Analog Comparators with Variable Threshold Detection

– 100µA ±6% Current Source (LIN Node Identification)

– Interrupt and Wake-up on Pin Change

– Programmable Watchdog Timer with Separate On-Chip Oscillator

– On-chipTemperature Sensor

•Special Microcontroller Features

– Low Power Idle, Noise Reduction, and Power Down Modes

– Power On Reset and Programmable Brown Out Detection

– In-System Programmable via SPI Port

– High Precision Crystal Oscillator for CAN Operations (16MHz)

1. See certification on Atmel®web site and note on “Baud Rate” on page 177.

8-bit

Microcontroller

with

16K/32K/64K

Bytes In-System

Programmable

Flash

Atmel

ATmega16M1

ATmega32M1

ATmega64M1

ATmega32C1

ATmega64C1

Automotive

7647H–AVR–03/12

Atmel ATmega16/32/64/M1/C1

– Internal Calibrated RC Oscillator (8MHz)

– On-chip PLL for fast PWM (32MHz, 64MHz) and CPU (16MHz)

•Operating Voltage:

– 2.7V - 5.5V

•Extended Operating Temperature:

– –40°C to +125°C

•Core Speed Grade:

– 0 - 8MHz at 2.7 - 4.5V

– 0 - 16MHz at 4.5 - 5.5V

ATmega32/64/M1/C1 Product Line-up

Part Number ATmega32C1 ATmega64C1 ATmega16M1 ATmega32M1 ATmega64M1

Flash Size 32 Kbyte 64 Kbyte 16 Kbyte 32 Kbyte 64 Kbyte

RAM Size 2048 bytes 4096 bytes 1024 bytes 2048 bytes 4096 bytes

EEPROM Size 1024 bytes 2048 bytes 512 bytes 1024 bytes 2048 bytes

8-bit Timer Yes

16-bit Timer Yes

PSC No Yes

PWM Outputs 4 4 10 10 10

Fault Inputs (PSC) 0 0 3 3 3

PLL 32/64MHz

10-bit ADC Channels 11 single

3 Differential

10-bit DAC Yes

Analog Comparators 4

Current Source Yes

CAN Yes

LIN/UART Yes

On-Chip Temp. Sensor Yes

SPI Interface Yes

7647H–AVR–03/12

Atmel ATmega16/32/64/M1/C1

1. Pin Configurations

Figure 1-1. ATmega16/32/64M1 TQFP32/QFN32 (7*7 mm) Package.

Note: On the engineering samples (Parts marked AT90PWM324), the ACMPN3 alternate function is not

located on PC4. It is located on PE2.

(PCINT18/PSCIN2/OC1A/MISO_A) PD2

(PCINT19/TXD/TXLIN/OC0A/SS/MOSI_A) PD3

(PCINT9/PSCIN1/OC1B/SS_A) PC1

VCC

GND

(PCINT10/T0/TXCAN) PC2

(PCINT11/T1/RXCAN/ICP1B) PC3

(PCINT0/MISO/PSCOUT2A) PB0

PB4 (AMP0+/PCINT4)

PB3 (AMP0-/PCINT3)

PC6 (ADC10/ACMP1/PCINT14)

AREF(ISRC)

AGND

AVCC

PC5 (ADC9/ACMP3/AMP1+/PCINT13)

PC4 (ADC8/ACMPN3/AMP1-/PCINT12)

(PCINT1/MOSI/PSCOUT2B) PB1

(PCINT25/OC0B/XTAL1) PE1

(PCINT26/ADC0/XTAL2) PE2

(PCINT20/ADC1/RXD/RXLIN/ICP1A/SCK_A) PD4

(ADC2/ACMP2/PCINT21) PD5

(ADC3/ACMPN2/INT0/PCINT22) PD6

(ACMP0/PCINT23) PD7

(ADC5/INT1/ACMPN0/PCINT2) PB2

PD1

(PCINT17/PSCIN0/CLKO)

PE0

(PCINT24/RESET/OCD)

PC0

(PCINT8/INT3/PSCOUT1A)

PD0

(PCINT16/PSCOUT0A)

PB7 (ADC4/PSCOUT0B/SCK/PCINT7)

PB6 (ADC7/PSCOUT1B/PCINT6)

PB5 (ADC6/INT2/ACMPN1/AMP2-/PCINT5)

PC7 (D2A/AMP2+/PCINT15)

ATmega32/64M1 TQFP32/QFN32

7647H–AVR–03/12

Atmel ATmega16/32/64/M1/C1

Figure 1-2. ATmega32/64C1 TQFP32/QFN32 (7*7 mm) Package

Note: On the first engineering samples (Parts marked AT90PWM324), the ACMPN3 alternate function is

not located on PC4. It is located on PE2.

(PCINT18/OC1A/MISO_A) PD2

(PCINT19/TXD/TXLIN/OC0A/SS/MOSI_A) PD3

(PCINT9/OC1B/SS_A) PC1

VCC

GND

(PCINT10/T0/TXCAN) PC2

(PCINT11/T1/RXCAN/ICP1B) PC3

(PCINT0/MISO) PB0

PB4 (AMP0+/PCINT4)

PB3 (AMP0-/PCINT3)

PC6 (ADC10/ACMP1/PCINT14)

AREF(ISRC)

AGND

AVCC

PC5 (ADC9/ACMP3/AMP1+/PCINT13)

PC4 (ADC8/ACMPN3/AMP1-/PCINT12)

(PCINT1/MOSI) PB1

(PCINT25/OC0B/XTAL1) PE1

(PCINT26/ADC0/XTAL2) PE2

(PCINT20/ADC1/RXD/RXLIN/ICP1A/SCK_A) PD4

(ADC2/ACMP2/PCINT21) PD5

(ADC3/ACMPN2/INT0/PCINT22) PD6

(ACMP0/PCINT23) PD7

(ADC5/INT1/ACMPN0/PCINT2) PB2

PD1

(PCINT17/CLKO)

PE0

(PCINT24/RESET/OCD)

PC0

(PCINT8/INT3)

PD0

(PCINT16)

PB7 (ADC4/SCK/PCINT7)

PB6 (ADC7PCINT6)

PB5 (ADC6/INT2/ACMPN1/AMP2-/PCINT5)

PC7 (D2A/AMP2+/PCINT15)

ATmega32/64C1 TQFP32/QFN32

7647H–AVR–03/12

Atmel ATmega16/32/64/M1/C1

1.1 Pin Descriptions

Table 1-1. Pin out description

QFN32 Pin

Number Mnemonic Type Name, Function and Alternate Function

5GNDPowerGround: 0V reference

20 AGND Power Analog Ground: 0V reference for analog part

4 VCC Power Power Supply

19 AVCC Power

Analog Power Supply: This is the power supply voltage for

analog part

For a normal use this pin must be connected.

21 AREF Power

Analog Reference : reference for analog converter . This is

the reference voltage of the A/D converter. As output, can be

used by external analog

ISRC (Current Source Output)

8 PB0 I/O

MISO (SPI Master In Slave Out)

PSCOUT2A (PSC Module 2 Output A)

PCINT0 (Pin Change Interrupt 0)

9 PB1 I/O

MOSI (SPI Master Out Slave In)

PSCOUT2B (PSC Module 2 Output B)

PCINT1 (Pin Change Interrupt 1)

16 PB2 I/O

ADC5 (Analog Input Channel 5 )

INT1 (External Interrupt 1 Input)

ACMPN0 (Analog Comparator 0 Negative Input)

PCINT2 (Pin Change Interrupt 2)

23 PB3 I/O AMP0- (Analog Differential Amplifier 0 Negative Input)

PCINT3 (Pin Change Interrupt 3)

24 PB4 I/O AMP0+ (Analog Differential Amplifier 0 Positive Input)

PCINT4 (Pin Change Interrupt 4)

26 PB5 I/O

ADC6 (Analog Input Channel 6)

INT2 (External Interrupt 2 Input)

ACMPN1 (Analog Comparator 1 Negative Input)

AMP2- (Analog Differential Amplifier 2 Negative Input)

PCINT5 (Pin Change Interrupt 5)

27 PB6 I/O

ADC7 (Analog Input Channel 7)

PSCOUT1B (PSC Module 1 Output A)

PCINT6 (Pin Change Interrupt 6)

28 PB7 I/O

ADC4 (Analog Input Channel 4)

PSCOUT0B (PSC Module 0 Output B)

SCK (SPI Clock)

PCINT7 (Pin Change Interrupt 7)

Note: 1. On the first engineering samples (Parts marked AT90PWM324), the ACMPN3 alternate

function is not located on PC4. It is located on PE2.

7647H–AVR–03/12

Atmel ATmega16/32/64/M1/C1

30 PC0 I/O

PSCOUT1A (PSC Module 1 Output A)

INT3 (External Interrupt 3 Input)

PCINT8 (Pin Change Interrupt 8)

3 PC1 I/O

PSCIN1 (PSC Digital Input 1)

OC1B (Timer 1 Output Compare B)

SS_A (Alternate SPI Slave Select)

PCINT9 (Pin Change Interrupt 9)

6 PC2 I/O

T0 (Timer 0 clock input)

TXCAN (CAN Transmit Output)

PCINT10 (Pin Change Interrupt 10)

7 PC3 I/O

T1 (Timer 1 clock input)

RXCAN (CAN Receive Input)

ICP1B (Timer 1 input capture alternate B input)

PCINT11 (Pin Change Interrupt 11)

17 PC4 I/O

ADC8 (Analog Input Channel 8)

AMP1- (Analog Differential Amplifier 1 Negative Input)

ACMPN3 (Analog Comparator 3 Negative Input)

PCINT12 (Pin Change Interrupt 12)

18 PC5 I/O

ADC9 (Analog Input Channel 9)

AMP1+ (Analog Differential Amplifier 1 Positive Input)

ACMP3 (Analog Comparator 3 Positive Input)

PCINT13 (Pin Change Interrupt 13)

22 PC6 I/O

ADC10 (Analog Input Channel 10)

ACMP1 (Analog Comparator 1 Positive Input)

PCINT14 (Pin Change Interrupt 14)

25 PC7 I/O

D2A (DAC output)

AMP2+ (Analog Differential Amplifier 2 Positive Input)

PCINT15 (Pin Change Interrupt 15)

29 PD0 I/O PSCOUT0A (PSC Module 0 Output A)

PCINT16 (Pin Change Interrupt 16)

32 PD1 I/O

PSCIN0 (PSC Digital Input 0)

CLKO (System Clock Output)

PCINT17 (Pin Change Interrupt 17)

1 PD2 I/O

OC1A (Timer 1 Output Compare A)

PSCIN2 (PSC Digital Input 2)

MISO_A (Programming & alternate SPI Master In Slave Out)

PCINT18 (Pin Change Interrupt 18)

Table 1-1. Pin out description (Continued)

QFN32 Pin

Number Mnemonic Type Name, Function and Alternate Function

Note: 1. On the first engineering samples (Parts marked AT90PWM324), the ACMPN3 alternate

function is not located on PC4. It is located on PE2.

7647H–AVR–03/12

Atmel ATmega16/32/64/M1/C1

2 PD3 I/O

TXD (UART Tx data)

TXLIN (LIN Transmit Output)

OC0A (Timer 0 Output Compare A)

SS (SPI Slave Select)

MOSI_A (Programming & alternate Master Out SPI Slave In)

PCINT19 (Pin Change Interrupt 19)

12 PD4 I/O

ADC1 (Analog Input Channel 1)

RXD (UART Rx data)

RXLIN (LIN Receive Input)

ICP1A (Timer 1 input capture alternate A input)

SCK_A (Programming & alternate SPI Clock)

PCINT20 (Pin Change Interrupt 20)

13 PD5 I/O

ADC2 (Analog Input Channel 2)

ACMP2 (Analog Comparator 2 Positive Input)

PCINT21 (Pin Change Interrupt 21)

14 PD6 I/O

ADC3 (Analog Input Channel 3)

ACMPN2 (Analog Comparator 2 Negative Input)

INT0 (External Interrupt 0 Input)

PCINT22 (Pin Change Interrupt 22)

15 PD7 I/O ACMP0 (Analog Comparator 0 Positive Input)

PCINT23 (Pin Change Interrupt 23)

31 PE0 I/O or I

RESET (Reset Input)

OCD (On Chip Debug I/O)

PCINT24 (Pin Change Interrupt 24)

10 PE1 I/O

XTAL1 (XTAL Input)

OC0B (Timer 0 Output Compare B)

PCINT25 (Pin Change Interrupt 25)

11 PE2 I/O

XTAL2 (XTAL Output)

ADC0 (Analog Input Channel 0)

PCINT26 (Pin Change Interrupt 26)

Table 1-1. Pin out description (Continued)

QFN32 Pin

Number Mnemonic Type Name, Function and Alternate Function

Note: 1. On the first engineering samples (Parts marked AT90PWM324), the ACMPN3 alternate

function is not located on PC4. It is located on PE2.

7647H–AVR–03/12

Atmel ATmega16/32/64/M1/C1

2. Overview

The ATmega16/32/64/M1/C1 is a low-power CMOS 8-bit microcontroller based on the AVR

enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the

ATmega16/32/64/M1/C1 achieves throughputs approaching 1 MIPS per MHz allowing the sys-

tem designer to optimize power consumption versus processing speed.

2.1 Block Diagram

Figure 2-1. Block Diagram

The AVR core combines a rich instruction set with 32 general purpose working registers. All the

32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent

registers to be accessed in one single instruction executed in one clock cycle. The resulting

architecture is more code efficient while achieving throughputs up to ten times faster than con-

ventional CISC microcontrollers.

Flash Program

Memory

Instruction

Decoder

Program

Counter

Control Lines

32 x 8

General

Purpose

Registrers

ALU

Status

and Control

I/O Lines

EEPROM

Data Bus 8-bit

Data

SRAM

Direct Addressing

Indirect Addressing

Interrupt

Unit

SPI

Unit

Watchdog

Timer

4 Analog

Comparators

DAC

ADC

MPSC

Timer 1

Timer 0

HW LIN/UART

CAN

Current Source

7647H–AVR–03/12

Atmel ATmega16/32/64/M1/C1

The ATmega16/32/64/M1/C1 provides the following features: 16K/32K/64K bytes of In-System

Programmable Flash with Read-While-Write capabilities, 512/1024/2048 bytes EEPROM,

1024/2048/4096 bytes SRAM, 27 general purpose I/O lines, 32 general purpose working regis-

ters, one Motor Power Stage Controller, two flexible Timer/Counters with compare modes and

PWM, one UART with HW LIN, an 11-channel 10-bit ADC with two differential input stages with

programmable gain, a 10-bit DAC, a programmable Watchdog Timer with Internal Individual

Oscillator, an SPI serial port, an On-chip Debug system and four software selectable power sav-

ing modes.

The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI ports, CAN,

LIN/UART and interrupt system to continue functioning. The Power-down mode saves the regis-

ter contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or

Hardware Reset. The ADC Noise Reduction mode stops the CPU and all I/O modules except

ADC, to minimize switching noise during ADC conversions. In Standby mode, the Crystal/Reso-

nator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up

combined with low power consumption.

The device is manufactured using Atmel’s high-density nonvolatile memory technology. The

On-chip ISP Flash allows the program memory to be reprogrammed in-system through an SPI

serial interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot pro-

gram running on the AVR core. The boot program can use any interface to download the

application program in the application Flash memory. Software in the Boot Flash section will

continue to run while the Application Flash section is updated, providing true Read-While-Write

operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a

monolithic chip, the Atmel ATmega16/32/64/M1/C1 is a powerful microcontroller that provides a

highly flexible and cost effective solution to many embedded control applications.

The ATmega16/32/64/M1/C1 AVR is supported with a full suite of program and system develop-

ment tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit

emulators, and evaluation kits.

2.2 Automotive Quality Grade

The ATmega16/32/64/M1/C1 have been developed and manufactured according to the most

stringent requirements of the international standard ISO-TS-16949. This data sheet contains

limit values extracted from the results of extensive characterization (Temperature and Voltage).

The quality and reliability of the ATmega16/32/64/M1/C1 have been verified during regular prod-

uct qualification as per AEC-Q100 grade 1.

As indicated in the ordering information paragraph, the products are available in only one tem-

perature grade.

Table 2-1. Temperature Grade Identification for Automotive Products

Temperature Temperature Identifier Comments

-40 ; +125 Z Full AutomotiveTemperature Range

7647H–AVR–03/12

Atmel ATmega16/32/64/M1/C1

2.3 Pin Descriptions

2.3.1 VCC

Digital supply voltage.

2.3.2 GND

Ground.

2.3.3 Port B (PB7..PB0)

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port B output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port B also serves the functions of various special features of the ATmega16/32/64/M1/C1 as

listed on page 69.

2.3.4 Port C (PC7..PC0)

Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port C output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port C also serves the functions of special features of the ATmega16/32/64/M1/C1 as listed on

page 72.

2.3.5 Port D (PD7..PD0)

Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port D output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port D also serves the functions of various special features of the ATmega16/32/64/M1/C1 as

listed on page 75.

2.3.6 Port E (PE2..0) RESET/ XTAL1/ XTAL2

Port E is an 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port E output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port E pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port E pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

If the RSTDISBL Fuse is programmed, PE0 is used as an I/O pin. Note that the electrical char-

acteristics of PE0 differ from those of the other pins of Port E.

If the RSTDISBL Fuse is unprogrammed, PE0 is used as a Reset input. A low level on this pin

for longer than the minimum pulse length will generate a Reset, even if the clock is not running.

The minimum pulse length is given in Table 7-1 on page 47. Shorter pulses are not guaranteed

to generate a Reset.

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