Texas Instruments TPS272C45 User manual

User’s Guide

TPS272C45 Evaluation Module

ABSTRACT

The TPS272C45EVM is a hardware evaluation module (EVM) used to enable hardware engineers to evaluate

the full performance and functionality of the TPS272C45 industrial high side switch. The TPS272C45EVM

contains everything needed to test and assess the TPS272C45 before designing it into part of a greater

application's power system. The evaluation module is designed to either be used as a standalone board with an

attached voltage supply and output load or in conjunction with an underlying Texas Instruments microcontroller

by using the standardized BoosterPack headers. A wide range of application features such as current sensing,

multiplexed current limiting, and transient suppression are enabled and visible through use of this evaluation

module.

Table of Contents

1 Introduction.............................................................................................................................................................................2

2 Compatibility Across Silicon Versions................................................................................................................................. 3

3 BoosterPack Operation..........................................................................................................................................................4

4 TPS272C45EVM Schematic................................................................................................................................................... 5

5 Connection Descriptions....................................................................................................................................................... 6

6 TPS272C45EVM Assembly Drawings and Layout............................................................................................................... 7

7 Current Limit Configuration.................................................................................................................................................10

8 Current Sense .......................................................................................................................................................................11

9 Transient Protection............................................................................................................................................................. 12

10 Bill of Materials................................................................................................................................................................... 13

11 Revision History..................................................................................................................................................................15

List of Figures

Figure 4-1. TPS272C45EVM Schematic Drawing....................................................................................................................... 5

Figure 6-1. 3D Representation.................................................................................................................................................... 7

Figure 6-2. Top Layer...................................................................................................................................................................7

Figure 6-3. Power Layer.............................................................................................................................................................. 8

Figure 6-4. Ground Layer............................................................................................................................................................ 8

Figure 6-5. Bottom Layer............................................................................................................................................................. 9

Figure 7-1. Multiplexed Current Limit.........................................................................................................................................10

List of Tables

Table 2-1. EVM Considerations Across Silicon Versions.............................................................................................................3

Table 3-1. Connected BoosterPack Header Pins on TPS272C45EVM....................................................................................... 4

Table 5-1. Connections and Test Points...................................................................................................................................... 6

Table 5-2. Jumper Configurations................................................................................................................................................6

Table 10-1. TPS272C45 Bill of Materials................................................................................................................................... 13

Trademarks

All trademarks are the property of their respective owners.

www.ti.com Table of Contents

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TPS272C45 Evaluation Module 1

1 Introduction

The Texas Instruments TPS272C45EVM is an evaluation module that is used to demonstrate and showcase

all of the features of the underlying TPS272C45 industrial high side switch. This evaluation board provides a

seamless way to connect a set of power supplies to the inputs of the TPS272C45, connect loads to the output

channels, and switch on and off the device using the control pins of the chip itself. An on-board 3.3-V LDO

is included on the EVM to simplify controlling signals to the TPS272C45 and easily assert and deassert logic

signals by the use of a set of external hardware jumpers. Additionally this EVM includes BoosterPack headers

allowing the user to easily connect the TPS272C45 high side switch to an underlying microcontroller and write

software to control and configure the device.

Features of the TPS272C45EVM include:

• Multiplexed current limit configuration on ILIM1

• BoosterPack headers allowing power switch to be controlled by external microcontroller

• On-board 3.3-V LDO allowing for control signals to be manipulated by set of jumpers

• Ideal board layout and copper area for thermal performance

• Ability to support versions A, B, C, and D of the TPS272C45

• Optional footprint to populate external inductive clamping diodes (version C of TPS272C45)

• Optional footprint to populate TVS diode for Vdd input (version A of TPS272C45)

Introduction www.ti.com

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2 Compatibility Across Silicon Versions

The TPS272C45EVM is compatible across all versions of the TPS272C45. This compatibility includes the

TPS272C45A with the external Vdd rail (A version), the TPS272C45B version without the Vdd rail (B version),

the TPS272C45C with support for the external inductive loading diode (C version), and the TPS272C45D with

fault output for individual channel (D version). By default, the A version of the silicon is populated on the EVM.

The footprints among the A, B, C, and D versions of the TPS272C45 silicon are footprint compatible and can be

interchanged by unpopulating the A version that ships default on the EVM and soldering, populating the desired

version of the silicon.

The A, C and D version of the device includes the ability to power the digital logic of the TPS272C45 from an

external Vdd pin. While the Vdd input pin exists on the A version of the TPS272C45 it does not exist in the B

versions. When using the B versions of silicon on this EVM, disconnect the Vdd line (and associated jumper,

J17) and ground the pin as this pin is classified as GND for B versions of the TPS272C45. Additionally with the

A, C and D version of the silicon it is possible to solder a TVS diode to D6 to filter out transients to the Vdd line.

This TVS diode must have a reverse standoff voltage equal to the logic level of the voltage rail being fed into

Vdd. For example, if the logic level is 5 V, then a SMAJ5.0CA diode is appropriate to filter any transients above 5

When using the C version of the device, populate D2, D3, D8, and D9 with the relevant diodes required for

inductive loading. TI recommends the SMC series of diodes due to their ability to dissipate large energies

and handle current required for discharging charged inductors during switch turn-off. These diodes must be

chosen so that reverse standoff voltage falls within the nominal operating supply voltage of the device and

anything above the breakdown voltage is considered a transient. The SMCJ48A-TR, for example, is able the

absolute device max rating of 48 V and filter any transients above this level. More information about the transient

protections provided by the EVM can be found in Transient Protection.

When using the D version of the device, make sure jumper J23 is connected to the FLT1_IC position to get the

Fault output for each channel.

A table of the versions of TPS272C45 and considerations that have to be taken can be found in Table 2-1.

Table 2-1. EVM Considerations Across Silicon Versions

TPS272C45 Version Considerations

ADefault version populated on EVM. Follow desired settings from Connection

Descriptions.

Unable to use external Vdd.

Do not plug supply into J6.

Do not populate J17.

Do no populate TVS diode on D6.

CFollow same guidance of A version.

Populate inductive loading discharge diode on D2, D3, D8, and D9.

DFollow same guidance of A version.

Populate J23 with jumper in position of FLT2_IC.

www.ti.com Compatibility Across Silicon Versions

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TPS272C45 Evaluation Module 3

3 BoosterPack Operation

While the TPS272C45EVM can be used as a standalone evaluation board without the need of any external

microcontroller, the EVM also comes populated with BoosterPack headers (J1, J2, J3, J4) to enable easy

interface with a Texas Instruments microcontroller. The 40-pin headers of the BoosterPack headers are used,

however all signals can be accessed using headers J1 and J2 enabling use with the 20-pin header. Additionally

by populating jumper J19 the user has the ability to power the underlying LaunchPad through the integrated

3.3-V LDO on the TPS272C45EVM. A list of pins connected to the BoosterPack header can be seen below in

Table 3-1:

Table 3-1. Connected BoosterPack Header Pins on TPS272C45EVM

BoosterPack Pin Function Note

J1-1 3.3-V power rail Disconnect J19 if powering LaunchPad via USB.

J1-2 Current sensing through the SNS pin Populate a Zener diode on D7 if it is required to limit analog

signal of pin

J1-5 DIA_EN pin used to enable diagnostics Can be used to multiplex multiple TPS272C45 switches to one

analog pin

J1-8 SEL pin used to change measurement reported on

SNS pin

J2-11 LATCH pin used to change fault behavior

J2-12 ILIM1 pin used to enable a10-kΩ resistor R13 for

ILIM1 Active high. Do not enable at same time as J2-13.

J2-13 ILIM2 pin used to enable a 4.99-kΩ resistor R14 for

ILIM1 Active high. Do not enable as same time as J2-12.

J2-17 FLT pin used to detect faults Open drain input. Pull-up source can be controlled using

jumper J18.

J2-18 EN2 to enable VOUT2 Active high. Can be connected to PWM.

J2-19 EN1 to enable VOUT1 Active high. Can be connected to PWM.

J2-20 Module GND Do not connect to IC ground if ground network is used

Note that for all IO and analog signals being attached to the BoosterPack, the relevant 4.7-kΩ protection

resistors are populated in series with the pin.

To power the attached LaunchPad from the on-board LDO of the TPS272C45EVM, connect the jumper J19.

Note that this feeds the output of the 3.3-V LDO on the TPS272C45EVM into the 3.3-V rail on the LaunchPad.

If there is another power supply trying to power the LaunchPad (such as the integrated USB power on the

LaunchPad itself) this can potentially cause issues with the separate power sources fighting for contention.

Jumpers J8 through J12 are used to manually configure the control signals going into the TPS272C45.

When using a microcontroller to control these signals these jumpers must be unpopulated to allow for the

microcontroller to drive them high or low. Additionally the header labeled J18 can be used to configure how

the FAULT pin is pulled up. This pin is an open drain output used to report faults on the TPS272C45 such as

overcurrent or open load. If J18 is connected to the pin marked BP on the silkscreen the FAULT pin is pulled

up through the 1-kΩ resistor R9 to the 3.3-V rail of the BoosterPack. Similarly if the jumper labeled J17 is

connected to the BP pin the Vdd rail of the TPS272C45 is connected to the 3.3-V rail of the BoosterPack. If J17

is populated to be fed from the LDO or BoosterPack, it cannot be supplied externally from the J6 banana jack.

Note that one useful feature of the TPS272C45 EVM is the ability to sense the from the SNS pin of the

TPS272C45 through the analog input of the microcontroller attached to the BoosterPack headers. A 1.0-kΩ

resistor is connected to convert the current coming out of the SNS pin to a voltage, however care must be

given to ensure that this value does not violate the input maximum of the microcontroller's analog input. To

mitigate, a Zener diode can be soldered to D7 (do not populate by default) to regulate the voltage going into the

microncontroller's analog input.

BoosterPack Operation www.ti.com

4TPS272C45 Evaluation Module SLVUBV4A – DECEMBER 2020 – REVISED DECEMBER 2021

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4 TPS272C45EVM Schematic

571-0500

J20

571-0500

J21

571-0500

J22

571-0100

EN1_IC EN2_IC

4.7k

R11

4.7k

R12

4.7k

R10

4.7k

DIA_EN_IC SEL_IC LATCH_IC

GND

OUT 1

DNC 2

P G 3

NC 6

DELAY

EP GND

TPS7A1633DGNRU1

GND

BAS21-7-F

1.0k

J16

961102-6404-AR

961103-680 4-AR

J10

961103-680 4-AR

J11

961103-680 4-AR

J12

961103-680 4-AR

J13

961103-680 4-AR

GND_IC

1.0 0k

R16

4.7k

R15

100V

100pF

SNS _IC

GND

SNS _BP

TP1

5010

TP2

5010

TP3

5010

TP4

5011

TP5

5011

571-0100

VOUT1

VOUT2

J17

961103-680 4-AR

BP_3V3

VDD_IC

SNS _BP

FLT_IC/FLT1_IC

EN2_IC

EN1_IC

GND

LATCH_IC

SEL_IC

BP_3V3

DIA_EN_BP

4.7k

DIA_EN_IC

VDD_IC

ILIMD_IC/FLT2_IC

J14

961102-640 4-AR

J15

961102-640 4-AR

ILIM1_IC

ILIM1_CTL_BP1 ILIM1_CTL_BP 2

ILIM1_CTL_BP1

ILIM1_CTL_BP2

GND_IC

Analog S e nsing

Current Limiting

Booste rP a ck He a de rs

3.3V LDO

Ground Ne twork

Configura tion J umpe rs

GND_IC

22nF

100V

GND

22nF

100V

1.0k

J18

961103-680 4-AR

FLT_PU

BP_3V3

1 3

D1 BAS21-7-F

+3.3V

Analog_In

LP_UART_RX

LP_UART_TX

GP IO !

Analog In

S P I_CLK

GP IO !

I2C_SCL

I2C_SDA

+5V 21

GND 22

Analog_In 23

Analog_In 24

Analog_In 25

Analog_In 26

Analog_In/I2S _WS 2 7

Analog_In/I2S _S CLK 28

Analog_O ut/I2S _S Dou t 29

Analog_O ut/I2S _S Din 30

J1/J 3

SS Q-110-03-T-D

GP IO ! 31

GP IO ! 32

GP IO ! 33

GP IO ! 34

Time r_Ca p/GP IO ! 35

Time r_Ca p/GP IO ! 36

P WM/GP IO ! 37

P WM/GP IO ! 38

P WM/GP IO ! 39

P WM/GP IO ! 40

GP IO !

S P I_CS /G P IO !

S P I_MIS O

S P I_MOS I

RS T

GP IO

GP IO !

P WM/GP IO !

GND

J2/J 4

SS Q-110-03-T-D

GND

2 3

2N7002Q-7-F

2 3

2N7002Q-7-F

FLT_PU

48.7

SMAJ5 .0CA

VDD

19 OUT1 1

OUT1 2

OUT1 3

OUT2 5

OUT2 6

OUT2 7

EN1

EN2

FLT

DIA_EN

ILIMD

LATCH

PowerPad 25

SEL

SNS

ILIM1

ILIM2

NC 4

NC 22

GND 17

TPS 272C45A/D

VDD_IC

GND

EN1_IC

EN2_IC

FLT_IC/FLT1_IC

DIA_EN_IC

SEL_IC

SNS _IC

LATCH_IC

ILIM1_IC

ILIM2_IC

48V

SMCJ48A-TR

48V

SMCJ48A-TR

GND

571-0500

TP6

5011

GND

2.2 µF

50V

3.3 V

MMSZ52 26B-7-F

J19

961102-640 4-AR

STPS 1150A

GND

TP10

5126

TP7

5126

4.7 nF

100V

100nF

100V

2.2 uF

100V

1uF

TP8

5126

TP9

5126

TP11

5011

4.9 9k

R14

10.0k

R13

36V

SMBJ36A-13-F

10k

R17

10k

R18

J23

961103-680 4-AR

Configura tion for Ver D

ILIMD_IC

ILIMD_IC/FLT2_IC

ILIMD_IC

FLT2_IC

4.7k

R20

1.0k

R19

FLT_PU

FLT2_IC

TP12

5126

19.6k

Figure 4-1. TPS272C45EVM Schematic Drawing

www.ti.com TPS272C45EVM Schematic

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TPS272C45 Evaluation Module 5

5 Connection Descriptions

Table 5-1 shows the test points populated on the board as well as the signal connectors.

Table 5-1. Connections and Test Points

Connector and Test Point Description

J1 to J4 BOOST-XL headers to connect to Texas Instruments LaunchPad Ecosystem

J5, TP1 Supply voltage

J6 Supply rail for Vdd (A, C, D version of the TPS272C45 only)

J7, J22, TP4, TP5, TP6 Ground connections

TP7 Current sense output (SNS)

J20, TP3 Output voltage 2 (VOUT2)

J21, TP2 Output voltage 1 (VOUT1)

TP8 Enable for VOUT1 (EN1)

TP9 Enable for VOUT2 (EN2)

TP10 Shared fault line (FAULT)

TP11 IC Ground (IC_GND)

Table 5-2 shows the relevant configuration jumpers of the TPS272C45EVM as well as the associated values.

Please refer to the TPS272C45 data sheet for detailed information on each pin's functionality.

Table 5-2. Jumper Configurations

Jumper Function/Settings

J8 Controls EN1 and enables, disables VOUT1

J9 Controls EN1 and enables, disables VOUT2

J10 Sets DIA_EN and enables, disables diagnostics

J11 Controls the SEL pin to set which diagnostics are reported by the SNS pin

J12 Sets the functionality of the device during fault conditions via the LATCH pin

J13 Enables, disables the on-board 3.3-V LDO. Must be set to top position (marked on silk screen as 3.3-V

LDO) to allow J8 to J12 to be high.

J14, J15

Controls which resistance value that is going into ILIM1. Only populate either J14 or J15 (not both) at a

time. If J14 is populated a 10-kΩ value is used and if J15 is used a 4.99-kΩ value is used for ILIM1. If

controlling from a from a microcontroller do not populate J14 or J15.

J16 Controls whether or not to use the diode/resistor ground network for reverse current blocking. Populate

jumper to bypass ground network.

J17 Selects if Vdd is being supplied by the BoosterPack or the on-board LDO. Do no populate if being supplied

externally through J6.

J18 Controls if the FAULT line is being pulled up by the BoosterPack or the on-board LDO

J19 Connects the BoosterPack 3.3-V rail to the on-board LDO's 3.3-V output giving the ability to power the

connected LaunchPad from the LDO.

J23 Configures pin 18 to be connected to ILIMD in A, B, C version or FLT1 in D version

Connection Descriptions www.ti.com

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6 TPS272C45EVM Assembly Drawings and Layout

Figure 6-1. 3D Representation

Figure 6-2. Top Layer

www.ti.com TPS272C45EVM Assembly Drawings and Layout

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TPS272C45 Evaluation Module 7

Figure 6-3. Power Layer

Figure 6-4. Ground Layer

TPS272C45EVM Assembly Drawings and Layout www.ti.com

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Figure 6-5. Bottom Layer

www.ti.com TPS272C45EVM Assembly Drawings and Layout

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TPS272C45 Evaluation Module 9

7 Current Limit Configuration

The TPS272C45EVM has the ability to configure both the ILIM1 and ILIM2 pins of the TPS272C45 to set a wide

range of current limits that are custom tailored to the end design. Additionally the user is able to custom tailor

the duration of time taken before the output current shuts off through the resistor connected to the ILIMD pin.

The external current limits of the TPS272C45EVM are controlled by external resistors R13 and R14 (ILIM1), R2

(ILIM2), and R3 (ILIMD). Note that these resistors are populated in the 0805 package size allowing for easy

soldering and desoldering.

The ILIM1 pin is configured in such a way that multiplexed current limits can be selected from an external

microcontroller through the BoosterPack headers. This feature can seen below in Figure 7-1:

Figure 7-1. Multiplexed Current Limit

With this configuration, the user can choose to enable the MOSFET Q1 if the 10.0-kΩ resistor is desired or

enable the MOSFET Q2 if the 4.99-kΩ resistor is desired. TI does not recommend to enable both channels

simultaneously as this would parallel both of the resistors and add an undesired capacitance to the line. If

multiplexing is not needed, the user can manually populate either the J14 or J15 jumpers. Please refer to the

TPS272C45 data sheet for information on how to calculate delays from relevant resistor values.

Current Limit Configuration www.ti.com

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