Sharp PC-1251 User manual

SHARP

CORPORATION

*

Di

ff

er

e

n

ce

betw

ee

n PC

1

2

50

a

nd PC

1

2

51

:

Program

d

a

ta

area

of

th

e

P

C

-1

251

i

s

lar

ge

r by

2

048

byt

es

.

-t:<

CE

-1

2

5

o

pt

ion

:

Microcassett

e

t

a

p

e

r

e

cord

e

r

is

ava

il

a

bl

e as

a

n

e

xt

e

rnal

m

e

mory

d

e

v

ice

a

n

d

2

4-d

ig

it

th

e

rmal

dot

p

r

inter

i

s

i

n

cor

po

ra

t

e

d as

th

e

o

utput

devi

ce.

1.

PROD

UC

TS

OUTLIN

E

.

2.

SP

ECIF

I

CA

TIO

N

.

3. BLOCK

DI

AG

R

AM

.

. .

. . . . . . . . . .

.

. . . . . .

.

. .

. . . . . . . .

. . .

. .

3

4

.

C

P

U

INTE

R

NAL

B

L

O

CK

DI

AG

R

A

M

AN

D

/

SI

GNAL

D

E

S

C

RIPTION

. .

4

5.

L

C

D

DRI

VE

C

IR

C

UIT

AN

D

TIM

I

NG

S

. .

.

. . . .

.

. .

.

. .

. . . . . . . .

.

. .

.

7

6.

S

E

R

VIC

E

PR

ECAUTIONS

. .

.

. . . . . . . . . . .

.

. .

.

. .

. . . . . . . .

.

. . . .

.

9

7

.

SCH

E

MATICS 10

8. PARTS SIGNAL LAYOUT CHART

11

9. PARTS

GUI

D

E AND PARTS LIST

1

2

PC-12

51

PC

-1250

MODEL

C

OD

E:

O

OZPC1251

///

E

SERVICE MANUAL

SHARP

PC-1251

(Sufficientfor

approximately

30

0 hours

usage

without

external power

supply

. )

Operating Temperature:

0

°

C

~

40

°

C

(32

°

F

~

104

°

F)

Dimens

i

ons

:

135 (W) x 70 (D) x

9

.

5 (H) mm

5-5

/

16

11

(W)

x

2-3/4

11

(D)x3/8

11

(H)

Weight:

Approximately

115

g

(0.25 lbs) (with cells)

Accessor

i

es

:

Wallet

,

two

lithium

cells

(bu

i

lt-in), two

keyboard templates and instruction manual

Options

:

Printer/M

i

cr

ocassette Recorder

(CE

-

125)

Power Consumption:

Power Supply:

Numeric Precision:

Editing Features:

Memory

Protection

:

Display:

Keys:

Ope

r

ators:

Addition,

subtraction,

multiplication,

division, exponentiation,

trigonometric

and

inverse

trigonometric functions

,

logarithmic and exponential functions, angle conver-

sion, squareroot, sign, absolute,

integer

,

relational operators, logical

operators

.

10 digits (mantissa)

+

2

digits (exponent)

Cursor

left

and right, line up and

down

,

character insert, character

delete

.

CMOS Battery backup

24 character

liqu

i

d

crystal display

with

5 x

7

dot characters

52

keys

:

Alphabetic, numeric,

spec

i

al

symbols

,

and

funct

i

ons. Numeric pad.

Use

r

defined keys.

6.0 V DC

Lithium

cells

Type:

CR

-

2032

6.0 V

[email protected]

W

Stack

:

Sub-routine: 10 stacks

FOR-NEXT

:

5

stacks

Function: 16 stacks

Data

:

8 stacks (RAM: 4 K)

48 Bytes

3486 Bytes

208 Bytes

About

500 Bytes

24

K

BytesSystem

ROM

:

RAM

System

User

Fixed Memory Area

(A~

Z

,

A$~

Z$)

ReserveArea

Program/Data Area

Memory Capacity:

Model: PC-1251 Pocket Computer

Processor: 8

bit

CMOSCPU

Programming

Language

:

BASIC

2. SPECiFiCATiON

The

SHARP PC-1251

system consistsof:

*

52

-

cha

r

acter keyboard.

*

24

-

character

display

.

*

Powerful BASIC in 24K ROM.

*

8

bi

t

CMOSprocessor.

*

4KB

RAM

.

*

Optiona

l

CE-125

Printer/Microcassette Recorder.

1

.

iNTRODUCTiONTO

THE

PC-1251

2

NOTE:

Standard cassette tape recorder can

only

be

used

to write

data

to

the computer via the

CE

-

125

.

Recording

to

the standard cassette tape

is

not

possible

.

P

C

-

1

25

0

I

1251

/

s:

<,

I

'

..

__

,,..

:

1

6K

:

B

yte

:

2

/

4

K

:

B

y

te

:

..

_

Lithi

u

m

ce

l

ls

R

AM

System

ROM

C

PU

X2

24

D

i

G

L

CD

1

1P

in

PR

I

N

TE

R

OFF

llilI[J

ON

0

2

4

Dig it

THERM

A

L

PR

i

NTER

S

T

A

ND

AR

D

C

ASS

ETTE

RE

CORDE

R

SP

U

M

-3

Ty

pe

N

ic

dX4

M

iC

R

O

C

ASS

ETTE

RE

C

:c

A

ss

E

T

-

E

:

~

ci

~

-

~~i

1

:~

--

1

:

C

o

ntr

o

l

ler

:

1

----

---

-

---

..

REMOT

E

DIDO

OF

F

ON

I

R

O

L

PAP

ER

I

O

PTi

O

N

C

E

-

1

25

AC

Adapt

o

r

.

•SYSTEM LAYOUT

Reserve

/

Cond

i

tioning

ke

y

Key boa

r

d

P

o

wer

/

M

od

e

s

lid

e

s

wit

c

h

Di

s

p

l

ay

sect

i

on

•KEY LAYOUT

3

THER

MAL

PR

i

NTE

R

MTP

20

1-24BA

PCU

SC6858

rem

o

t

e

'

M

-13H

M

iC

R

O

CASSE

TT

E

t

a

p

e

re

c

o

r

de

r

C

iR

CUi

T

Mi

C

RO

C

ASS

ETTE

.

..

.

....

.

..

. .

....

.

Y

.

~:0

1

•

.

1')

.

(

O

P

T

iO

N

)

CE

-

1

25

RA

M

2Kb

y

te

I

P

C

1251 Only

C

E

RAM

2

KB

y

te

HM

6

1 1

6

or

CTC5517)

ROM

16K

B

Y

t

e

LH

53

2916

C

E

R

/

W

A

o

-

10.

01-8

IY

J

I

B

O

s

V

GG

-

H

A

-

HA

D

IS

...__

_

__._..,

D

iS

C

E

P

A

L

R

/

W

01-

s

or

S

C4

3536

L

D

4

VA

~

Vs

' ~

Vrns

SC

435

36

~

Se

1

V\cK

B

U

S

Y

Se

i

Z

Di

n

D

ou

t

C

.

P.

U

.

SC618

6

0

A02

o

r

SC

6

18

60 A

02

LD

R

/

W

~

---

--+--+-_._--1-1---------,,.........----~

¢A

L

>--

-

----+.-...._--+l--~------t--

-

---~

0

1

-0

s

•

DATA

BU

S

l

AO

1

-3

~

=

====l==::::;::;:=:#:======t===n=fj=~=

)

ADDRESS BUS

B

0

1

-1

~=

====

=l==;:;:il:=:#:======t==n::::fl=fj=~

I

B

03

,F

0

1

-3

L':::::

====

=:!==l:l:::li==J~====;==r=t==fAF~:::>~

C

H

i

P

E

NABL

E

IB

s

IB

1

FOu

F0

5

F

0

3 I

I

B

5

I

B

3

'

~

B

UZZ

ER

c:::i

,

K

E

Y

M

ATR

iX

(

51

K

E

Y+

O

N

KE

Y

)

Slide

S

w

i

t

c

h

.....--

1

A1

I

r+

I

A

s

I

B1

-IB

4

Xo

Xi

V

GG

-

TEST

dT

--.

RES

ET

-

K

ON

~-

G

...

N

_

D

__

v

c

v

oc

Vots

Vs

V

M

VA

.L

.r,

+

z~

T

.

-

V

GG

~~ CJ

~

LCD

2

4Di

g

+

?sy

mb

o

l

s

V

GG

3'

!

3.

PC-1250

/

PC-1251

SYSTEM

BLOCK DiAGRAM

4

Pin Signal

I

N/OUT

Description (Standby

=

power

off)

No. name

1

A01 OUT Address

bus

,

high during standby

.

2

R/W OUT Write clock, normally

high

.

3

0AL

OUT

Low order bits address latch, normally

h

i

gh. The clock used

to

latch

low

order 8 bits

of

16-b

i

t

address signal on the data bus line

when

a

larae caoacltv ROM

i

s

used.

4 TES IN Test pin, normally

low

.

5

01

IN Oscillator

i

nput

.

6

00

OUT Oscillator output.

7

RES IN Resetinput, active

h

i

gh

.

Normally, pulled down to low level.

8

Xin IN Input (MT in)

of

microcassettesignalfrom the CE-125option.

9 ON IN ON (BREAK) key input, normally pulled down to low level.

10

Xout

OUT Output (MT out

1)

of

m

i

crocassette signalto the CE-125 option and the buzzer.

11

D

i

s

OUT LCD

dr

i

ver

con

t

rol signal.

12

HA OUT LCD driver clock, low during standby and in

2

kHz oscillation during display.

•CPU pin

No

.

and

s

i

gnal description

1

0

P

O

R

T

1-4

KEY

OUT

5-8 for

TERMINAL

INTER FACE

F01

·

1

F

Out

Por

t

F0

2

:

!I

F

Out Port

FO

i

.

RAM

Bas

i

c

RAM

F

O

,

GRAOE

U

P

RAM

F

O;

.

PROGRAM ROM

C

E

Addre

ss

Latch

1

8

1

-B

¢

AL

R

/

W

F

01

F

01

F

03

F

04

FO

;

C

E

)(

CE

J

C

E)

I

,

1

I

B

•

!

xL

h

:~.

.

s

U

j

RO

M

(

BK

B

y

te

)

07

DO

•

C

.

P

.

U

.

(SC61860A02) ·········

8

Bits C-MOS

C

.

P

.

U

.

4. C.P.U.iNTERNAL

BLOCK DiAGRAM

&

TERMiNAL DESCRiPTiONS

Hg

-1

5

Si

gna

l

IN/

O

UT

De

s

cr

i

p

ti

o

n

(

Standby

=

pow

e

r

off

)

No

.

name

1

3

i

A8

IN

/

OUT

K

e

y input/strobe

si

g

na

l

,

l

ow

d

uring standby and

k

e

y

-

i

n

pulse

is

genera

ted when

low

.

14

i

A7

I

N

/OU

T

Key

input

/

str

o

be

si

g

na

l

,

l

ow

d

uri

n

g

s

t

andby and key-in pulse

is

gener

at

e

d

w

h

en

low

.

15

i

A6

I

N

/

OUT

Key input/strobe

s

i

gnal

,

lo

w

d

u

r

i

n

g

s

t

andby and

key

-

in pulse

is

ge

n

er

ate

d when

l

ow

.

16 iA5

IN

/

OUT

Key

in

put

/st

ro

be

sign

a

l , l

ow

d

u

ri

ng

standby and

ke

y

-in pulse

is

ge n

er

ate

d

w

h

en

low

.

17

i

A4

IN

/

OUT

K

e

y

i

np

ut

/st

ro

be

s

i

gnal

, l

ow

du

ri

ng

standby and key-in pulse

is

gene

r

at

ed

w

h

en

l

ow.

18

i

A3

IN

/

OUT

Key

in

p

ut

/

st

ro

b

e

sign

a

l, low

d

uri

ng

s

tandby and

-

key-in pulse

i

s

genera

ted when

l

ow.

19 iA2

I

N/

OU

T

K

e

y

input

/

strobe signal,

lo

w

durin

g

standby

an

d

key

-

in

pul

s

e

is

ge n

era

ted when

l

ow

.

20 iA1

IN

/O

UT

K

ey

i

nput/s

t

r

ob

e

s

ig

nal,

lo

w

du

ri

ng

standby and key-in pulse

is

genera

t

e

d

w

hen

l

ow.

21

iB8 IN ACK

sig

na

l

that

e

n

ables the

CP

U

to

r

e

ad

data through

1

/

0 port

(

PCU).

22

i

B7 IN

Dat

a

in

(Din)

.

S

e

r

ial

d

at

a

i

np

u

t

fr

om PCU

(bit

by

bit

se

rial

ha

ndshake).

23 iB6 OUT SEL2

o

utput,

P

-

ty

p

e

open drain.

24

i

B5 OUT

S

EL

1

output,

P

-type open

drain

.

25 iB4

I

N

S

lide switch input.

26 iB3

OU

T Key strobe

o

utput,

low

dur

i

ng

stan

db

y

a

nd

key

-

in pulse

is

gen

erat

e

d

when

low

.

27

iB

2

OUT Key

s

trobe

output

,

l

o

w

dur

i

ng

s

tandb

y and key-in pulse

is

g

enerated when

low

.

28

iB

1

OUT

Ke

y

st

r

obe

outpu

t,

low during standby

a

nd

key-in pulse

is

ge

ne

ra

ted when

low

.

29 VM IN LCD

po

wer

su

pp

l

y

.

30

VA

IN

L

CD

powe

r supply

.

31

GND IN

Powe

r supply.

32

H1

O

U

T

LC

D

b

ac

k

plate

signal

,

h

i

gh

i

mpeda

n

ce

duri

ng

st

andby

'

and

4

-

level pulse

d

u

ring

di

sp

la

y

.

33 H2

O

UT

L

CD

bac

kplate

si

gn

al,

hi

gh

i

mpedan

c

e

during

s

t

and

b

y

an

d

4

-

le

ve

l

pulse

d

ur

ing

dis

play

.

3

4 H3 OUT

LCD

b

ackp

late

sign

a

l

,

high impedan

c

e

during

s

t

a

n

db

y

a

nd

4

-

leve

l

pu

l

s

e

during display

.

35 H4 OUT

LCD

b

a

c

kplate

signa

l

,

high impedance

d

ur

in

g

sta

nd

by

an

d

4-

l

e

v

el

puls

e

during

di

s

play

.

36

H

5

OUT

LCD

b

ackplate

s

i

gnal

,

high

i

mped

a

n

ce

d

u

r

i

n

g

stan

d

by and 4-level pulse

during display

.

37 H6 OUT

LCD

back

p

la

te signal, high

i

mpedance

d

u

ri

ng

sta

ndby

and

4

-l

eve

l

pulse

during display

.

38 H7 OUT

LCD

backpl

at

e

si

gna

l

,

high

i

m

p

edance

d

uring standby and

4

-l

evel pulse

during di

spla

y.

39 H8 OUT

L

C

D

backplate

sig

n

al,

h

i

gh impedance

duri

ng

s

ta

ndby and

4

-l

evel pulse

d

u

ring

dis

p

lay.

40 H9

OU

T

LCD

backplate

sig

n

al, high

i

m

p

e

d

a

nc

e

d

u

r

i

n

g

s

t

andby and

4-

l

eve

l

pulse

d

u

ring

display

.

41

H10

OU

T

LC

D

bac

k

plate

sign

a

l

,

hi

g

h

impe

d

a

n

ce

during

standby and

4

-l

evel pulse

duri

ng

dis

play

.

42

H

1

O

UT

LC

D

ba

c

kplate

s

i

g

nal

,

hi

gh

im

pe

d

an

c

e

during

s

tandby

and

4-

l

evel pulse

dur

i

ng

dis

play.

43 H12 OUT

LCD

backplate

signal

,

high

impedanc

e

duri

n

g

stand

by and 4-level pulse

during

dis

p

l

a

y

.

44 H13

OU

T

LCD

backplate signal, high impedance

duri

n

g

sta

ndby and

4

-

l

e

vel pulse

during

di

sp

l

a

y.

45 H14

OU

T

LCD

backplate

signal

,

high impedance

d

u

ring

s

ta

nd

b

y and

4

-le

ve

l

pulse

du

ring

displ

a

y.

46 H15

--

No

t

used.

(

D

isp

l

ay

of

t

his

unit

o

p

erat

es

i

n

1/

14

duty.

)

47

H

1

6

-

N

o

t

u

sed

.

(

D

isplay

of

th

i

s

un

i

t

o

p

e

ra

tes in

1

/

14

duty.)

48

Vs

I

N

L

CD power

supply

,

high during

standb

y

a

nd low when the high level

cl

ock

sto

p

s

.

49

V

D

i

s IN LCD

po

w

er supply, high

d

u

rin

g

stan

dby and low when

th

e

high level

c

l

o

c

k stops.

50

Vee

IN

LC

D

power supply,

norm

a

l

y

low

.

6

Pin Signal

IN/OUT

Desc

r

iption (Standby

=

power

off)

No

.

name

51

Voe OUT LCD power

s

upply

,

high during

s

t

andby and low when the high

lev

e

l

clock

stops

.

52 VGG IN Powersupply normally low.

53

08 IN/OUT

Data

bus

,

normally high

impedance

.

54

07

IN/OUT

Data bus,normally high impedance.

55

06

IN/OUT

Data bus,normally high

impedance

.

56

05

IN/OUT

Data bus,normally high

impedance

.

57

04 IN/OUT

Data bus,normally high impedance.

58

03

IN/OUT

Data

bus

,

normally high

impedance

.

59

02

IN

/

OUT

Data bus,normally

h

i

gh

impedance.

60 01

IN/OUT

Data bus,normally high

impedance

.

61

Fo5 OUT External system ROM chip enable (CE1).

62 Fo4 OUT Expansion RAM

(PC

·

1251 RAM) chip enable

(CE2)

.

63 Fo3 OUT BasicRAM

(PC

-

1250

,

PC

-

125

1)

chip enable (CE3).

64 Fo2 OUT Data out

(Do

u

t)

,

data

outpu

t

port

to

pe

r

ipheral.

65 Fo1 OUT BUSH

l

/

F

output

port output.

66 Bo8 OUT LCD driver LSI chip enable(CE4).

67 Bo7 OUT A

14

.

Addressbus,

h

i

gh

during

s

t

andby

.

68 Bo6 OUT

A13

.

Ad

dr

ess

bus

,

h

i

gh

duri

ng

standby

.

69 Bo5 OUT A

12

.

Addressbus,

h

i

gh

during

s

t

a

ndby

.

70 Bo4 OUT A

11

.

Address

bus

,

high during standby.

71

Bo3 OUT A

10

.

Addressbus,high

dur

i

ng

standby

.

72 Bo2 OUT

A9.

Address

bus

,

h

i

gh

during

standby

.

73 Bo1 OUT AS. Address

bus

,

high

duri

ng

standby.

74 Ao8 OUT

A7

.

Address

bus

,

high during

standby

.

75 Ao7 OUT

A6

.

Addressbus,high

dur

i

ng

standby.

76 Ao6 OUT

A5

.

Address

bus

,

high

dur

i

ng

standby.

77 Ao5 OUT

A4

.

Addressbus,high

dur

i

ng

standby

.

78 Ao4 OUT

A3

.

Address

bus

,

high during standby.

79 Ao3 OUT

A2

.

Address

bus

,

high

du

r

ing standby.

80 Ao2 OUT A

1.

Addressbus,high during standby.

7

-

7

.

0V

(

M

o

t

e

)

vo

i

s

=7

.

0V

(

E

X

AMP

L

E

.)

..,_

-

5

.6

V

-

-4

.

2

V

-

2

.

BV

-

1

.

4V

-

a

v

-

·

-

VA

~

VM

~

VB

'---

Retains the oft

.

atate

.

Lt:

R

E

S

ET ON

l

V

DiS

/

5

*

G

ND

-VAH

-

f

VM

H

-

I

3

VBH

-

5\

DiS

V

o

t

;

s

/

5

VAL

-

t

v

o

.

s

~

v

.

-

5

-

5

DIS

VM

L

- t

1

v

o

i

s

VDis

·

V

s

L

- T

HA

P

o

w

e

r

o

tt

(

C

P

U

standb

y

)

Disp

l

ay

on

80P

in

bis

Disp

lay

o

ut

• LCD

ti

m

i

ng

c

h

a

rt

~-

-

--·-

- -

-

. .

· -

--·

-

--

-

.

-

-- --

----

-

-----

-

- -

-·

Re

ad

/

Wr

i

t

e

(

RAM

F

OR

DISPLAY

)

64

b

y

te

64

by

te

(

40

-

7

F

) (

00

-

3

F

)

LCD display screen of 24 dig

i

ts

is

divided into two

se

ct

ions,

H

1

-

H

7

are used for the backplate

signal from the first

to

twelveth digits. H8

-

H

14

ar

e

used

fo

r

th

e

backplate

s

i

gnal from

the

thir

-

teenth

digit

to the twenty-fourth

dig

i

t.

Thus

,

the

L

CD

is

operated

in

1/14

duty.

V

tn

s

V

A

M M

¢AL

Qj

)

:

.

~

:

0

:

~

.

c

•

<l)

•

E

:

Ol

<l)

l--

--

-+--

(

-

S

6

~

2

)

---i-

~

S

6

~

1

_____,

~

(

S

63

)

S63

G

N

D

V

GG

DIS

H

A

1

·

-

- -

-

- -

9-

-

-?

-

~-

:

~

----'

--~

•

L

CD

Dr

i

ver

L

Si

(SC4353

6)

5.

LCD

DRiVE

CiR

C

UiT

AND

TiMiNGS

8

h5

=

0

h

5

=1

all

O

FF

(

DiS

=

L)

V

A

L

V

BH

D

isp

l

ay

ON

V

BL

VA

H

D

i

sp

l

ay

O

FF

V

A

H

VBH

ON ON

O

N

ON

O

FF

O

FF

O

FF

O

FF

OF

F

OFF

O

N

O

N

ON

O

N

O

N

O

N

ON

O

N

O

FF

a

l l

OFF

vrns

=

vsr

_.

B

ack plate

(

H1

)

wavefor

V

MH

-.

--

-

--

-

---

-

--

-

- -

-----

--

-

Se

g

me

nt

Te

rm

i

nal

w

aveform

GND=

VAH

-

h

3(

TR

3

)

h

4

(

TR

4

)

h

5

(

TR

5

)

h

1

C

TR

1)

--

-

------

--

-

--

---

-

--

h

2

C

TR

2

)

-

---

-

--

- -

--

-

--

-

- -

---

- -

-

----.

RE

S

DiS

H

A

•COUNTER

SECT

i

SN

&

Segment

term

i

nal

waveform

•LCD

POWER

SUPPLY

r-

-

--

-

Vee

VGG

(

Ab

o

ut

6

V

)

--l

V

oe

L

CD CONTRAST CONTOL

VD

i

S

1

--l

Vs

(

CP

U

LC

D

V

M

DRi

V

ER

I

1

VA

s

62

--l

LJ

9

e

:

Not

to

blur

at

30

°.

e

:

No

irregula

r

contrast

at

10

°.

~'"''

~

'

5

.

Checking display

qual

it

y and adjusting

potentio

-

meter

.

4. Consumption

current

measu

r

ement

o

Supply voltage: 5.8 V

o

Consumption

current

:

400

µA

max

.

when ON (after pushing of

the

ON key).

45

µA

max

.

when OFF

(

a

fte

r

pushing of

the

OFF key).

Be sure

to

press

the

ALL RESET

sw

i

tch

before

the

measurement

.

3. If

the

lithum

battery

is

not

installed properly and

with good electrical

contact

problems such as

flickering display

o

r

damage

to other

parts could

result.

Be

sure

the battery

is

properly installed.

2. When

the

memory module PWB

is

replaced it

could be installed slightly

out of

alignment due

to the

play in

the

screw

holes

.

Since this could

l

ead

to

improper

operation

,

replace

the

PWB

again and press

the

ALL RESET switch befor

resuming

operation.

1.

Since it

is

difficult to troubleshoot the

main PWB because of chassis

mounted

on

top

of it, it

is

suggested

that

you use

the

service tool

chassi

s

(LCHSS1134CCZZ) which

is

smaller in size. Install this chassis

for trouble-

sho

o

ting purposes

only

.

When

unit

is

repaired, replace with original chassis.

6. SERViCE PRECAUTiONS

Sharp PC-1251 User manual

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