Alinx KINTEX-7FPGA User manual

KINTEX-7 FPGA

Development Board

AX7325B

User Manual

KINTEX-7 FPGA Development Board AX7325B User Manual

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Version Record

Version

Date

Release By

Description

Rev 1.1

2022-08-30

Rachel Zhou

First Release

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Table of Contents

Version Record .............................................................................................2

Part 1: FPGA Development Board Introduction .......................................... 5

Part 2: FPGA Chip ....................................................................................... 8

Part 3:DDR3 DRAM ...................................................................................10

Part 4:SODIMM memory module interface ............................................... 16

Part 5: QSPI Flash .....................................................................................21

Part 6: Clock configuration ........................................................................ 23

Part7: USB to Serial Port ...........................................................................24

Part 8: SFP Interface ................................................................................. 25

Part 9: QSFP+ Fiber interface ................................................................... 28

Part 10: PCIe slot .......................................................................................30

Part 11: Temperature Sensor .....................................................................32

Part 12: SD Card Slot ................................................................................ 33

Part 13: FMC connector .............................................................................35

Part 14: Expansion Header ....................................................................... 39

Part 15: LED Light ......................................................................................41

Part16: User Buttons ................................................................................. 43

Part 17: JTAG Interface ............................................................................. 44

Part 18: Power Supply ............................................................................... 45

Part19: Fan ................................................................................................ 47

Part 20: Structure Diagram ........................................................................49

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The AX7325B FPGA development board, it is the XILINX KINTEX-7 FPGA

development platform.

The AX7325B FPGA development platform uses XILINX's KINTEX-7 chip

XC7K325 solution. The FPGA development board mounts four pieces of

512MB high-speed DDR3 SDRAM chips, and a SODIMM interface on the

board is used to expand the memory strip of DDR3. FPGA chip configuration

uses a 128Mb QSPI FLASH chip

In the design of expansion board, we have extended a wealth of interfaces

for users, such as 1 PCIex8 interface, 4 10G SFP interface, 1 40G QSFP+

optical interface, 1 UART serial port, 1 SD card slot, 1 FMC extension port, 1

40-pin expansion ports. It meets users' requirements for high-speed data

exchange, data storage, video transmission processing and industrial control. It

is a "professional" FPGA development platform, for high-speed data

transmission and exchange, pre-verification and post-application of data

processing is possible. This product is very suitable for students, engineers and

other groups engaged in KINTEX-7FPGA development.

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Part 1: FPGA Development Board Introduction

The AX7325B FPGA development board is mainly composed of KINTEX-7

main chip, 4 DDR3, 1 memory stick SODIMM interface, 1 QSPI FLASH and

some peripheral interfaces. The FPGA development board uses Xilinx's

KINTEX-7 series of chips, model number XC7K325TFFG900. Four DDR3

memory chips are connected to the HP port of the FPGA chip, each with a

DDR3 capacity of up to 512M bytes, which makes up 64-bit data bandwidth. A

SODIMM interface is connected to the HR port of the FPGA to fit a 64-bit DDR3

memory module. A 128Mb QSPI FLASH is used to statically store configuration

files or other user data of the FPGA chip.

The AX7325B development board expands the rich peripheral interface,

including one PCIex8 interface, four 10G optical SFP interfaces, one 40G

optical fiber + QSFP interface, one UART serial interface, one SD card

interface, and one FMC expansion interface. 1 40-pin expansion port and some

button LEDs.

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Figure 1-1: The Schematic Diagram of the AX7325B

Through this diagram, you can see the interfaces and functions that the

AX7325B FPGA Development Board contains:

Xilinx KINTEX-7 FPGA chip XC7K325TFFG900

DDR3

With four large-capacity 512 Mbytes (2 GB total) high-speed DDR3

SDRAM, used as FPGA data storage, image analysis cache, data

processing.

QSPI FLASH

A 128Mbit QSPI FLASH memory chip can be used as a storage for

FPGA chip configuration files and user data;

PCIe x8 interface

A standard PCIEx8 interface for PCIE communication with computer

motherboards, supports the PCI Express 2.0 standard, and

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single-channel communication rates up to 5Gbps.

4 SFP interfaces

The four high-speed transceivers of the GTX transceiver of the FPGA

are connected to the transmission and reception of four optical modules

to realize four high-speed optical fiber communication interfaces. Each

fiber optic data communication receives and transmits at speeds of up

to 10 Gb/s.

1 QSFP + optical interface

The four high-speed transceivers of the GTX transceiver of the FPGA

are connected to the optical module interface of a QSPF+, to implement

the optical communication interface of the QSFP+. Fiber optic data

communications receive and transmit at speeds of up to 40 Gb/s.

DDR3 memory module interface

One SODIMM memory module interface is used to assemble a DDR3

memory module, and the DDR3 data width of the interface is 64 bits.

The memory stick SODIMM interface expands the storage space and

data bandwidth for the FPGA development board.

USB Uart interface

1-channel Uart to USB interface for communication with the computer

for user debugging. The serial port chip adopts the USB-UAR chip of

Silicon Labs CP2102GM, and the USB interface adopts the MINI USB

interface.

Micro SD slot

1 Micro SD card slot

Temperature and humidity sensor

Onboard a temperature and humidity sensor chip LM75 for detecting

the temperature and humidity of the environment around the board

FMC expansion ports

A standard FMC LPC expansion port can be connected to various FMC

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modules of XILINX or ALINX (HDMI input/output module, binocular

camera module, high-speed AD module etc.)

JTAG Interface

A 10-pin0.1 spacing standard JTAG ports for FPGA program download

and debugging. Users can debug and download FPGAs through

XILINX downloader.

Clock

2 * 200Mhz differential crysta, A 156.25Mhz and A 125Mhz on the

board .

LED Light

6LEDs, 1 power indicator, 1 DONE configuration indicator, 4 FPGA

control indicators

Button

2 user buttons, connect to the normal IO of the FPGA.

Part 2: FPGA Chip

The FPGA development board uses Xilinx's KINTEX-7 FPGA chip, model

number XC7K325T-2FFG900I. The speed class is 2 and the temperature class

is industrial. This model is a FGG900 package with 900 pins and a 1.0mm pitch.

The chip naming rules for Xilinx KINTEX-7 FPGA are shown in Figure 2-1

below:

Figure 2-1: The Specific Chip Model Definition of KINTEX-7 Series

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Figure 2-2: FPGA chip XC7K325T on board

The main parameters of the FPGA chip XC7K325T are as follows

Name

Specific parameters

Logic Cells

33,280

Slices

5,200

CLB flip-flops

41,600

Block RAM（kb）

1,800

DSP48 Slices

PCIe Gen2

XADC

12bit, 1Mbps AD

GTP Transceiver

16，12.5Gb/s max

Speed Grade

-2

Temperature Grade

Industrial

FPGA power supply system

KINTEX-7 FPGA power supplies are VCCINT, VCCBRAM, VCCAUX, VCCAUX_IO VCCO,

VMGTAVCC and VMGTAVTT. VCCINT is the FPGA core power supply pin, which needs to

be connected to 1.0V; VCCBRAM is the power supply pin of FPGA Block RAM,

connect to 1.0V; VCCAUX is FPGA auxiliary power supply pin, connect 1.8V; VCCO

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is the voltage of each BANK of FPGA, including BANK0, BANK12~18,

BANK32~34. On the AX7325B development board, BANK12~13 is connected

to the FMC connector. The default voltage of VCCO is 2.5V, which enables IO to

support LVDS interface. BANK16~18, BANK33~35 need to connect DDR3

memory and DDR3 chip, BANK voltage is 1.5V, other BANK voltage is 3.3V.

VMGTAVCC is the supply voltage of the internal GTP transceiver of the FPGA,

connected to 1.0V, VMGTAVTT is the termination voltage of the GTP transceiver,

connected to 1.2V.

The KINTEX-7 FPGA system requires that the power-up sequence be

have the same voltage, they can be powered up at the same time. The order of

power outages is reversed. The power-up sequence of the GTP transceiver is

VCCINT, then VMGTAVCC, then VMGTAVTT. If VCCINT and VMGTAVCC have the same voltage,

they can be powered up at the same time. The power-off sequence is just the

opposite of the power-on sequence.

Part 3:DDR3 DRAM

TheAX7325B FPGA development board is equipped with four 512MB

DDR3 chips, model MT41K256M16HA-125 (Compatible with

MT41J256M16HA-125). Four DDR3 SDRAMs form a 64-bit bus width.

Because four DDR3 chips are connected to the HP port of the FPGA, the

DDR3 SDRAM can run at speeds up to 800MHz (data rate 1600Mbps), and

four DDR3 memory systems are directly connected to the BANK32, BANK33,

and BANK34 interfaces of the FPGA. The specific configuration of DDR3

SDRAM is shown in Table 3-1.

Bit Number

Chip Model

Capacity

Factory

U3,U4,U6,U7

MT41K256M16HA-125

MT41J256M16HA-125

256M x 16bit

Micron

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