VINKA VK16K33 User manual
February 2020Rev. 1.21/27
Features
•Operating voltage 3.0-5.5V
•Built-in RC oscillator
•Max. 16 SEG and 8 GRID(Number of SEG pins in different packages)
•SEG pins connect to LED Anode , GRID pins connect to LED Cathode
•I2C bus interface,I2C slave address can be configured through IO pins
•16-level brightness control
•Max. 13 × 3 key scan
Key display multiplexing requires hardware circuit
Supporting combination keys requires circuit
•Read/Write address auto increment
•Dispaly mode 16x8
•Power-On Reset(POR)
•Versatile blinking modes
•Standby mode
•High driving current, suitable for highlighted applications
•Package:
SOP28(300mil)(18.00mm×7.50mm PP=1.27mm）
SOP24(300mil)(15.40mm×7.50mm PP=1.27mm）
SOP20(300mil)(12.80mm×7.50mm PP=1.27mm)
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VK16K33
16×8 LED DRIVER
The VK16K33 is a memory mapping and multi-function LED controller driver. The max. Display
segment numbers in the device is 128 patterns (16 SEG x 8 GRID) with a 13×3 (MAX.) matrix key scan
circuit. The software configuration features of the VK16K33 makes it suitable for multiple LED
applications including LED modules and display subsystems. The device communicates with host
microcontrollers via a two-line bidirectional I2C bus,it is used to configure display parameters and transfer
display data, and can also enter the standby mode through System Set Command .
SOP20/SOP24/SOP28 package.
February 2020Rev. 1.22/27
www.szvinka.com
1 General Description
VK16K33
16×8 LED DRIVER
February 2020Rev. 1.23/27
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2 Pinouts and pin description
2.1 VK16K33 SOP20 Pin Assignment
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
VDD
17
18
19
20
SDA
SCL
SEG0/K1
SEG1/K2
SEG2/K3
SEG3/K4
SEG4/K5
SEG5/K6
SEG6/K7
VSS
GRID0
GRID1/KS0
GRID2/KS1
GRID3/KS2
GRID4
GRID5
GRID6
GRID7
SEG7/K8/INT
TOP VIEW
SOP20
VK16K33
16×8 LED DRIVER
2.2 VK16K33 SOP20 Pin Description
February 2020Rev. 1.24/27
www.szvinka.com
OLED GRID outputs（N-MOS open drain ）
VSS
11-17 I/O
SEG6/K7-
SEG0/K1
18 I
SCL
LED GRID outputs（N-MOS open drain ）;
Key source output pin, active high during key scan operation
GRID1/KS0-
GRID3/KS2
6~9 OLED GRID outputs（N-MOS open drain ）
LED SEG outputs（P-MOS open drain ）；
Key data input pin, internal pull-low during key scan operation
Serial Clock Input for I2C interface
2GRID0
Negative power supply
3-5
1VSS
O
I/O
SDA
20 VDD
VDD
Serial Data Input/Output for I2C interface
Positive power supply
19
GRID4 ~GRID7
10 SEG7/K8/INT I/O
I. when bit0 of SEG / INT register is set to“ 0”,this pin is LED SEG output（P-
MOS open drain ）and Key data input during key scan operation.
II. when bit0 of SEG / INT register is set to“ 1”,this pin is Interrupt signal (INT)
output pin
bit1 of SEG/INT register is set to“ 0”,INT pin output active-low
bit1 of SEG/INT register is set to“ 1”,INT pin output active-high
VK16K33
16×8 LED DRIVER
No. I/O
Name Function
February 2020Rev. 1.25/27
www.szvinka.com
2.3 VK16K33 SOP24 Pin Assignment
VDD
SDA
SCL
SEG0/A1
SEG1/A0
SEG2/K1
SEG3/K2
SEG4/K3
SEG5/K4
SEG6/K5
SEG7/K6
SEG8/K7
VSS
GRID0/AD
GRID1/KS0
GRID2/KS1
GRID3/KS2
GRID4
GRID5
GRID6
GRID7
SEG11/K10/INT
SEG10/K9
SEG9/K8
1
2
3
4
5
6
7
8
9
10
11
12 13
14
SOP24
TOP VIEW
24
23
22
21
20
19
18
17
16
15
VK16K33
16×8 LED DRIVER
2.4 VK16K33 SOP24 Pin Description
February 2020Rev. 1.26/27
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O
VSS
11-19 I/O
SEG10/K9-
SEG2/K1
22 O
SCL
GRID1/KS0-
GRID3/KS2
6~9 OLED GRID outputs（N-MOS open drain ）
Serial Clock Input for I2C interface
2GRID0/AD
Negative power supply
3-5
1VSS
O
I/O
SDA
24 VDD
VDD
Serial Data Input/Output for I2C interface
Positive power supply
23
GRID4 ~GRID7
10 SEG11/K10
/INT I/O
20-21 SEG1/A0-
SEG0/A1 I/O LED SEG outputs（P-MOS open drain ）
I2C slave address setting pin, 4 address 0xe0-0xe3 can be set,
and bit0 is the read / write bit. *1
LED GRID outputs（N-MOS open drain ）;
Key source output pin, active high during key scan operation
LED SEG outputs（P-MOS open drain ）；
Key data input pin, internal pull-low during key scan operation
LED GRID outputs（N-MOS open drain ）
I2C slave address source output pin, active high during power on and key scan *1
*1 I2C slave address is selected through A2-A0 pins, and I2C slave address is updated during power on reset
or key scanning cycle
VK16K33
16×8 LED DRIVER
No. I/O
Name Function
I. when bit0 of SEG / INT register is set to“ 0”,this pin is LED SEG output（P-
MOS open drain ）and Key data input during key scan operation.
II. when bit0 of SEG / INT register is set to“ 1”,this pin is Interrupt signal (INT)
output pin
bit1 of SEG/INT register is set to“ 0”,INT pin output active-low
bit1 of SEG/INT register is set to“ 1”,INT pin output active-high
February 2020Rev. 1.27/27
www.szvinka.com
2.5 VK16K33 SOP28 Pin Assignment
VSS
GRID0/AD
GRID1/KS0
GRID2/KS1
GRID3/KS2
GRID4
GRID5
GRID6
GRID7
SEG15/K13/INT
SEG14/K12
SEG13/K11
SEG12/K10
SEG11/K9
VDD
SDA
SCL
SEG0/A2
SEG1/A1
SEG2/A0
SEG3/K1
SEG4/K2
SEG5/K3
SEG6/K4
SEG7/K5
SEG8/K6
SEG9/K7
SEG10/K8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SOP28
TOP VIEW
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VK16K33
16×8 LED DRIVER
2.6 VK16K33 SOP28 Pin Description
February 2020Rev. 1.28/27
www.szvinka.com
O
VSS
11-21 I/O
SEG14/K12-
SEG3/K1
26I
SCL
GRID1/KS0-
GRID3/KS2
6~9 OLED GRID outputs（N-MOS open drain ）
Serial Clock Input for I2C interface
2GRID0/AD
Negative power supply
3-5
1VSS
O
I/O
SDA
28VDD
VDD
Serial Data Input/Output for I2C interface
Positive power supply
27
GRID4 ~GRID7
10 SEG15/K13
/INT
I/O
23-25I/O
SEG2/A0-
SEG0/A2
LED GRID outputs（N-MOS open drain ）；
Key source output pin, active high during key scan operation
LED SEG outputs（P-MOS open drain ）；
Key data input pin, internal pull-low during key scan operation
LED GRID outputs（N-MOS open drain ）
I2C slave address source output pin, active high during power on and key scan*1
LED SEG outputs（P-MOS open drain ）
I2C slave address setting pin, 8 address 0xe0-0xee can be set,
and bit0 is the read / write bit. *1
VK16K33
16×8 LED DRIVER
No. I/O
Name Function
*1 I2C slave address is selected through A2-A0 pins, and I2C slave address is updated during power on reset
or key scanning cycle
I. when bit0 of SEG / INT register is set to“ 0”,this pin is LED SEG output（P-
MOS open drain ）and Key data input during key scan operation.
II. when bit0 of SEG / INT register is set to“ 1”,this pin is Interrupt signal (INT)
output pin
bit1 of SEG/INT register is set to“ 0”,INT pin output active-low
bit1 of SEG/INT register is set to“ 1”,INT pin output active-high
February 2020Rev. 1.29/27
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SCL
SDA
VDD
VSS
LCD driver/
dispaly RAM
GRID7
GRID4
SEG0/A2
SEG15/K13/INT
3 Functional Description
3.1 Block diagram
16-level brightness control
GRID1/KS0
GRID0/AD
GRID3/KS2
SEG2/A0
SEG3/K1
key Scan/
I2C address set/
INT
Key RAM
VK16K33
16×8 LED DRIVER
I2C
Controller
and
Timing
generator
February 2020Rev. 1.210/27
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3.2 Power-On Reset
●System Oscillator is off state
●GRID0~GRID3 outputs are set to VDD.
● GRID4~GRID7 outputs are set to high impedance.
●all SEG pins are set to input.
● LED Display Off.
●Key scan stopped.
● SEG/INT pin is set to SEG.
●brightness is set to 16/16 duty。
VDD
tSR>0.05V/ms
tOFF>20mS
VK16K33
16×8 LED DRIVER
When the power is applied, the device is initialized by an internal power-on reset circuit. Data transfers
on the I2C bus should be avoided for 1 ms following power-on.
The status of the internal circuits after initialization is as follows:
if VDD drops below the minimum voltage of operating voltage specification during operation, the
power-on reset timing conditions must be also satisfied. This means that VDD must fall to 0V and remain
at 0V for a minimum time of 20ms before rising to the normal operating voltage.
Power-on Reset Timing
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