Sony CDP-497 User manual

CDP-497

SERVICE MANUAL US Model

Canadian Model

AEP Model

UK Model

EModel

Australian Model

Phote: AEP Model

Model Name Using Similar Mechanism CDP-295

CD Mechanism Type CDM14-5BD8A

Optical Pick-Up Block Type BU-5BD8A

SPECIFICATIONS

Compact disc player

Freqency response

Signal-to-noise ratio

Dynamic range

Harmonic distortion

Channel separation

2Hz to 20 kHz ±0.5 dB

More than 10OdB

More than 98 dB

Less than 0.0035%

More than 100 dB

Outputs

LINE OUT (FIXED) (phono jacks)

Output level 2V (at 50 kilo hms)

Load impedance over 10kilohms

LINE OUT (VARIABLE) (phono jack)

(only for the UK and AEP model)

Output level max. 2V (at 50 kilohms)

Load impedance over 50 kilohms

PHONES (stereo phone jack)

Output level max. 10mW

Load impedance 32 ohms

General

Power requirements AEP model:

220V -230V AC, 50/60Hz

UK, Australian model:

240V AC, 50/60 Hz

US, Canadian model:

120V AC, 60 Hz

Emodel:

110 -120V/220 -240V AC,

adjustable with the voltage selector,

50/60 Hz

Power consumption 12W

Dimensions (approx., including projections)

430 X100 X295 mm (w/h/d)

(17 X4XII 5/8 inches)

Weight (approx.) 3.5 kg (7 lbs 12oz)

Remote commander

(AEP, G, UK model: RM-D597

US, Canadian, E, Australian model: RM-D297)

Remote control system Infrared control

Power requirements 3V DC with two R6 (size AA) batteries

Dimensions (approx., including projections)

40 X20 X175 mm (w/h/d)

(1 5/8 X13/16 X7inches)

Weight (approx.) 95g (4oz)

Supplied accessories

Audio cord

Remote commander

R6 (AA) batteries

(1) (2 phono plugs -2phono plugs)

(1)

(2)

DesIgh and specifications are subject to change without notice.

COMPACT DISC PLAYER

MICROFILM

CDP-497

1. Laser Diode Properties TABLE OF CONTENTS

•Material: GaAlAs

•Wavelength: 780 nm

*Emission Duration: continuous Section Title Paae

1. GENERAL

For the United Kingdom and European countries

Identifying the Parts 4

CLASS 1LASER PRODUCT

LUOKAN 1LASERLAITE

KLA8S 1LASERAPPARAT

This Compact Disc player is

classified as a CLASS 1LASER

product. The CLASS 1LASER

PRODUCT label is located on

the rear exterior.

2. DISASSEMBLY

3. ELECTRICAL BLOCK CHECKING

4. DIAGRAMS

SAFETY-RELATED COMPONENT WARNING!!

COMPONENTS IDENTIFIED BY MARK AOR DOTTED

LINE WITH MARK AON THE SCHEMATIC DIAGRAMS

AND IN THE PARTS LIST ARE CRITICAL TO SAFE

OPERATION. REPLACE THESE COMPONENTS WITH

SONY PARTS WHOSE PART NUMBERS APPEAR AS

SHOWN IN THIS MANUAL OR IN SUPPLEMENTS PUB-

LISHED BY SONY.

ATTENTION AU COMPOSANT AYANT RAPPORT

ALA S^CURIT^I

LES COMPOSANTS IDENTIFIES PAR UNE MARQUE A

SUR LES DIAGRAMMES SCHEMATIOUES ET LA LISTE

DES pieces SONT CRITIQUES POUR LA sEcURITE

DE FONCTIONNEMENT. NE REMPLACER CES COM-

POSANTS QUE PAR DES PIECES SONY DONT LES

NUMErOS SONT DONNEs dans CE MANUEL OU

DANS LES supplements PUBLIEs PAR SONY.

4-1. Pin Functions 8

•IC101 (CXD2501Q) Pin Function *8

•IC301 (CXD2500AQ) Pin Function 10

4-2. Circuit Boards Location 12

4-3. Block Diagram 12

4-4. Printed Wiring Boards —Main Block —15

4-5. Schematic Diagrams —Main Block —19

4-6. Printed Wiring Boards —MD Block —22

4-7. Schematic Diagrams —MD Block— 23

4-8. Semiconductor Lead Layouts 23

4-9. 1C Block Diagrams 25

5. EXPLODED VIEWS

5-1. Cabinet Section 27

5-2. MD Section (CDM14-5BD8A) 29

5-3. Pick-up Block (BU-5BD8A) *30

6. ELECTRICAL PARTS LIST 31

-2

CDP-497

MODEL IDENTIFICATION

—SPECIFICATION LABEL —

SONY® MODEL NO. CDP-497

COMPACT DISC PLAYER

SERIAL NO.

MADE IN JAPAN

US, Canadian MODEL AC:120V 60Hz 12W

AEP MODEL AC:220-230V~ 50/60Hz

Australian MODEL: AC;240V~ 50/60HZ

EMODEL AC:1 10-120, 220-240V~

50/eOHz 12W

SONY® MODEL NO. CDP-497

COMPACT DISC PLAYER

V////////////77?7/

SERIAL NO.

MADE IN FRANCE ^

AEP MODEL AC:220-230V~ 50/60HZ

UK MODEL AC:240V~ 50/60Hz

SAFETY CHECK-OUT

After correcting the original service problem,

perform the following safty check before releasing

the set to the customer:

Check the antenna terminals, metal trim, “metallized”

knobs, screws, and all other exposed metal parts for

AC leakage. Check leakage as described below,

LEAKAGE TEST

The AC leakage from any exposed metal part to

earth ground and from all exposed metal part to any

exposed metal part having areturn to chassis, must

not exceed 0.5 mA (500 microampers). Leakage

current can be measured by any one of three

methods.

1. Acommercial leakage tester, such as the

Simpson 229 or RCA WT-540A. Follow the

manufacturers’ instructions to use these instru-

ments.

2. Abattery-operated AC milliammeter. The Data

Precision 245 digital multimeter is suitable for

this job.

3. Measuring the voltage drop across aresistor by

means of aVOM or battery-operated AC volt-

meter. The “limit” indication is 0.75V, so

analog meters must have an accurate low-

voltage scale. The Simpson 250 and Sanwa

SH-63Trd are examples of apassive VOM that

is suitable. Nearly all battery operated digital

multimeters that have a2V AC range are

suitable. (See Fig. A)

To Exposed Metal

Parts on Set

voltmeter

(0.75V)

0.15 fiF ^1.5 kQ

—Earth Ground

Fig. A. Using an AC voltmeter to check AC leakege.

-3-

CDP-497 SECTION 1

GENERAL

Identifying the

Parts

Front Panel

\T\ POWER switch

[g Disc tray

Display window

[4] (stop) button

[g /(manual search) buttons

[e] Play mode buttons

CONTINUE button

SHUFFLE button

PROGRAM button

0CHECK (program check) button

[8] Numeric buttons

[9] EDIT/TIME FADE button

Qo| TIME SET button

[Tj] >12(over 12) button

nH LINE OUT/PHONE LEVEL control

(for the model for the United Kingdom

and European countries)

PHONE LEVEL control

(for the model for other countries)

dAUTO SPACE/AUTO CUE button

dPHONES jack

on PEAK SEARCH button

dCLEAR (program clear) button

Qt] music scan button

on FADER button

dREPEAT button

dTIME button

ig l/^(AMS*) buttons

dll (pause) button

d(play) button

d±OPEN/CLOSE button

*AMS is the abbreviation of Automatic

Music Sensor.

-4-

SECTION 2

DISASSEMBLY

Note: Fellow the disassemby procedure in the numerical order

given.

OTurn the cam to the direction of arrow (Counter clock

wise) by minus screw driver.

OTake off the disc table,

0Remove the yoke bracket.

ORemove the MD (BU-5BD8A) to the direction of arrow.

-5-

CDP-497 SECTION 3

ELECTRICAL BLOCK CHECKING

Note:

1. CD Block basically constructed to operate without

adjustment.Therefore, check each item in order given,

2. Use YDES-18 disc (3-702-101-01) unless otherwise

indicated.

3. Use the oscilloscope with more than lOMQ inpedance,

4. Clean an object lens by an applicator with neutral detergent

with the signal level is low than specified value with the

following checks.

SCurve Check

BD board

oscilloscope

{TP (FE) o

TP (VC) o-

RF Level Check

BD board {

oscilloscope

TP (RFC) o-

TP (VC) o

Procedure:

1. Connect oscilloscope to test point TP (RFO) on BD board.

2. Ture Power switch on.

3. Put disc (YEDS-18) in and playback.

4. Confirm that oscilloscope waveform is clear and check RF

signal level is correct or not.

Note:

Clear RF signal waveform means that the shape “O”can be

clearly distinguished at the center of the waveform.

Procedure:

1.Connect oscilloscope to test point TP (FE) on BD board.

2. Connect between test point TP (FEI) and TP (VC) by lead

wire.

3. Tured Power switch on and actuate the focus serch. (actuate

the focus serch when disc table is moving in and out.)

4. Check the oscilloscope waveform (S curve) is symmetrical

between Aand B. And confirm peak to peak level within 3 ±

1Vp-p.

,VOLT/DIV: 200 mV

RF signal waveform TIME/DIV: 500 nS

Scurve waveform symmetry

After check, remove the lead wire connected in step 2.

Note: •Try to measure several times to make sure that the

ratio of A:B or B:A is more than 10:7.

•Take sweep time as long as possible and light up the

brightness to obtain best waveform.

E-F Balance Check

oscilloscope

BD board {TP (TE)

TP (VC) o- o

Procedure:

1. Connect test point TP (ADJ) to ground and TP (TEI) to TP

(VC) with lead wire.

2. Connect oscilloscope to test point TP (TE) on BD board.

3. Turn Power switch on.

4. Put disc (YEDS-18) in and playback.

5. Confirm that the oscilloscope waveform is symmetrical on

the top and bottom in relation to OV, and check this level.

Treverse oscilloscope symmetry

-6-

CDP-497 SECTION 4

DIAGRAMS

4-1. PIN FUNCTIONS

•IC101 (CXD2501Q) PIN FUNCTION

I/O Function

ADII IA/D signal input.

2ADIO 0Analog switch output.

3RF IRF signal input.

4TE ITracking error signal input.

5SE ISE signal input.

6NC Not used.

7FE IFocus error signal input.

8VC nCenter voltage (2.5V) input.

9DVSS Digital GND.

10 NC

Not used.

11 ATSK

12 NC

13 DFSW IPrevents the DFCT circuit from operating at “H”.

14 DFCT 0DFCT signal output.

15 XTAL IMaster clock signal input.

16 NC Not used.

17 XTSL Frequency switching of input master clock signal. 22 MHz at “H”. 1 1 MHz at “L”.

18 UOCK ILock signal input.

19 FOK 0Focus OK signal output.

20 MIRR 0Mirror signal output.

21 CLK IClock signal when transmitting data from micro processor.

22 NC Not used.

23 ILatch signal when transmitting data from micro processor.

24 IData from micro processor.

25 1^^3111 0Track jump number count signal output.

26 Not used.

DVdd Digital +5V. -

NC Not used.

[fiQm SENS 0SENS signal output.

SCLK ISerial data reading clock.

31 NC Not used.

32 DIRC IDIRC signal input.

33 XRST IReset signal input.

34 SOCK

Not used.

35 XOLT

36 SOUT

37 NC

SFDR 0Sled drive signal output (FWD).

39 SRON Not used.

40 SRDR 0Sled drive signal output (REVERSE).

41 SFON Not used.

42 NC

43 DVSS Digital GND.

44 NC Not used.

CDP-497

RF PLL Free-run Frequency Check

Procedure:

1. Connect frequency counter to test point (PLCK) with lead

wire.

frequency counter

^—'

3. Confirm that reading on frequency counter is 4.3218 MHz.

Focus/Tracking Gain

This gain has amargin, so even if it is slightly off.

There is no problem.

Therefore, do not perform, this adjustment.

Please note that it should be fixed to mechanical center position

when you moved and do not know original position.

Main board

TP'^PL^)

2. Turn Power switch on.

CDP-497

Pin No. Pin Name I/O Function

45 TEST Fixed at “L”.

46 NC Not used.

47 TRDF 0Tracking drive signal output (FWD).

48 TRON Not used.

49 TRDR 0Tracking drive signal output (REVERSE).

50 TFON Not used.

51 FFDR 0Focus drive signal output (FWD).

FRON Not used.

FRDR 0Focus drive signal output (REVERSE).

mm FFON Not used.

55 NC

56 SSTP ILimit switch detection.

57 NC Not used.

CDS IUsed at “H”.

59 NC Not used.

60 DVdd Digital +5V.

61 AVdd Analog +5V.

62 IGEN Input for the ope-amp current supply.

63 NC Not used.

64 AVSS Analog GND.

-9

CDP-497

•IC301 (CXD2500QA) PIN FUNCTION

Pin No. IPin Name II/O Function

Focus OK input pin. Used for SENS output and servo auto sequencer.

Spindle motor output filter switching output.

Spindle motor ON-OFF control output.

Spindle motor servo control.

Samples GFS at 460 Hz, and outputs Hwhen GFS is H. Outputs Lif Lcontinues eight times.

Oscillation circuit output for analog EFM PLL.

Oscillation circuit input for analog EFM PLL. fLOCK=8,6436 MHz.

TEST pin. Normally GND.

Charge pump output for analog EFM and PLL.

PLL charge pump output for variable pitch.

Clock input from the external VCO for variable pitch. fCcenter=l 6.9344 MHz.

Filter output for master PLL (Slave=Digital PLL).

Filter input for master PLL.

PLL charge pump output for master PLL.

Analog GND

Master VCO control voltage input.

Analog power supply (+5V)

EFM signal input.

Asymmetry circuit regulated current input.

Asymmetry comparative voltage input.

EFM full swing output (L=Vss, H=Vdd)

LrAsymmetiy circuit OFF HrAsymmetry circuit ON.

Not used.

Audio data output mode switching input. Serial output at L, parallel output at H.

D/A interface for 48 bit slot. Word-clock f=2Fs.

D/A interface for 48 bit slot. LR clock f=Fs.

Power supply (+5V).

DA16 (MSB) output when PSSL=1

48 bit slot serial data when PSSL=0 (2s’COMP, MSB first).

DA15 output when PSSL=1. 48 bit slot bit clock when PSSL=0.

DA14 output when PSSL=1.

64 bit slot serial data when PSSL=0 (2s* COMP, LSB first)

DA13 output when PSSL=1. 64 bit slot bit clock when PSSL=0.

DA12 output when PSSL=1. 64 bit slot LR clock when PSSL=0.

DAI 1output when PSSL=1. GTOP output when PSSL=0.

DA10 output when PSSL=1. XUGF output when PSSL=0.

DA09 output when PSSL=1. XPLCK output when PSSL=0.

DAOS output when PSSL=1 .GFS output when PSSL=0.

DA07 output when PSSL=1 .RFCK output when PSSL=0.

DA06 output when PSSL=1 .C2P0 output when PSSL=0.

DAOS output when PSSL=1. XRAOF output when PSSL=0.

-10 -

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