SN8P1829
8-Bit MCU build-in 12-bit ADC + PGIA + Charge-pump Regulator + 128 dots LCD driver
SONiX TECHNOLOGY CO., LTD Page10 Version1.0
PIN DESCRIPTIONS
PIN NAME TYPE DESCRIPTION
VDD, VSS P Power supply input pins for digital circuit.
VLCD P Power supply of COM0 ~ COM3, SEG0 ~SEG31.
AVDDR P Regulator power output pin, Voltage=3.8V Maximum output current=5mA.
AGND P Regulator Analog Ground.
AVDDCP P Charge Pump Voltage output. ( connect a 2.2uF or higher capacitor to ground)
RST I System reset input pin. Schmitt trigger structure, active “low”, normal stay to “high”.
XIN, XOUT I, O External oscillator pins. RC mode from XIN.
LXIN, LXOUT I, O Low speed (32768 Hz) oscillator pins. RC mode from LXIN.
P0.0 / INT0 I Port 0.0 and shared with INT0 trigger pin. (Schmitt trigger) / Built-in pull-up resisters.
P0.1 / INT1 I Port 0.1 and shared with INT1 trigger pin. (Schmitt trigger) / Built-in pull-up resisters.
P1.0~P1.3 I/O Port 1.0~P1.3 bi-direction pins / Built-in pull-up resisters.
P5.0 / SCK I/O Port 5.0 bi-direction pin and SIO’s clock input/output / Built-in pull-up resisters.
P5.1 / SI I/O Port 5.1 bi-direction pin and SIO’s data input / Built-in pull-up resisters.
P5.2 / SO I/O Port 5.2 bi-direction pin and SIO’s data output / Built-in pull-up resisters.
P5.3 / BZ1 / PWM1 I/O Port 5.3 bi-direction pin, TC1 ÷ 2 signal output pin or PWM1 output pin.
Built-in pull-up resisters.
P5.4 / BZ0 / PWM0 I/O Port 5.4 bi-direction pin, TC0 ÷ 2 signal output pin or PWM0 output pin.
Built-in pull-up resisters.
P2.0 ~ P2.7 I Port 2.0 ~ Port 2.7 input pins with pull-up register and shared with LCD’s
SEG24~SEG31.
AIN0 ~ AIN3 I Analog signal input pins for ADC converter.
COM0 ~ COM3 O LCD driver common pins.
SEG0 ~ SEG31 O LCD driver segment pins.
AvrefH, AverfL I ADC’s reference high / low voltage input pins.
OP1IN+, OP1IN- I Operational Amplifier 1 Input Channels
OPOUT1 O Operational Amplifier 1 Output Channel
OP2IN+, OP2IN- I Operational Amplifier 2 Input Channels
OPOUT2 O Operational Amplifier 2 Output Channel
PGIAIN+, PGIAIN- I PGIA Input Channels
PGIAOUT O PGIA Output Channel
PGIABIAS I PGIA Bias Voltage input
C+ A Positive capacitor terminal for charge pump regulator
C- A Negative capacitor terminal for charge pump regulator
Table 1-2 SN8P1829 pin description
