Casio CTK-750 User manual

(with price)

CTK-750

ELECTRONIC KEYBOARD

CTK-750

— 14 —

CONTENTS

Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Replacing the DSP (HG51A115A01FD) . . . . . . . . . . . . . . . . . . . . . 2

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Major Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

PCB View and Major Check Points . . . . . . . . . . . . . . . . . . . . . . . 16

Schematic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Exploded View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

IC and Transistor Lead Identification . . . . . . . . . . . . . . . . . . . . . 21

Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

— 1 —

General

Number of Keys: 61

Polyphonic: 32-note

Preset Tones: 128

Tone Expander: Layer, Split

Keyboard Controls: Touch Response: On/Off

Touch Sensitivity: Light/Middle/Heavy

Key Transpose: Range from F# to F by a half-note increment

Auto-Rhythms: 128

Tempo Control: 40 to 255

Auto-Accompaniment: CASIO Chord/Fingered/Full-Range Chord

Controller: Variation, Fill-In, Intro/Ending

Magical Preset Variations: 128; BREAK BEAT 16 MELODYCOMP 8

SHADOW DRUM 4 FREE SESSION 32

TONE STACK 40 KEY SPLIT 12

HYPERACTIVE 16

Digital Effects: 16; Reverb-1, Reverb-2, Reverb-3, Chorus, Tremplp, Phase Shifter,

Organ SP, Enhancer, Flanger, EQ Loudness, Delay-1, Delay-2,

Analog Delay, Tap Delay, Chorus Reverb, Tremolo Reverb

Sound/Control Pads: 6

Pad Variations: 32; Phrases: 10, Drums: 10, SE/Percussion: 10, Controller: 2

Song Memories: 2; Tracks: 6

System: Real-time recording

Memory Capacity: Approx. 5,800 notes

Registration Memories: 10

Registration Items: Tone Number, Rhythm Number, Tempo, Accompaniment Mode,

Accompaniment Volume, Effects, Layer On/Off, Split On/Off,

Pad Variation, Assignable Jack, Auto-Accompaniment On/Off,

Auto-Accompaniment Controller, MIDI (Channel On/Off, GM On/Off,

Local Control On/Off, Bend Range)

Tuning Control: 440Hz ±100 cents

Terminals: Headphone Jack [Output Impedance: 100 Ω, Output Voltage: 1.7 V(rms)

MAX], Assignable Jack, MIDI Jacks (IN, OUT), AC Adaptor Jack (12V)

Built-In Speakers: 12 cm dia. 1.1W Input Rating: 2 pcs.

Power Source: 2-way AC or DC source

AC: AC adaptor AD-12

DC: 6 D size dry batteries

Battery life: Approx. 5 hours by manganese batteries R20P(SUM-1)

Approx. 5 hours by alkaline batteries LR20(AM1)

Auto Power Off: Approximately 6 minutes after the last operation

Power Consumption: 18 W

Dimentions: 141 x 968 x 411 mm (HWD)

(5-11/16 x 38-1/16 x 16-5/16 inches) (HWD)

Weight: 7.0 kg (15.5 lbs) excluding batteries

Standard Accessory: Music stand

SPECIFICATIONS

— 2 —

Electrical

Current Drain with 12V DC:

No Sound Output 390 mA ±20%

Maximum Volume 1700 mA ±20%

with white keys D2 to D3 pressed in Synth-Bass-2 tone

and in Latin Fusion rhythm at initial setup tempo

Volume; maximum, Touch: maximum

Line Output Level (Vrms with 47 KΩload each cannel):

with key D4 pressed in FSynth-Bass-2 tone on L-ch 850 mV ±20%

with key G4 pressed in FSynth-Bass-2 tone on R-ch 800 mV ±20%

Phone Output Level (Vrms with 8 Ωload each channel):

with key D4 pressed in FSynth-Bass-2 tone on L-ch 280 mV ±20%

with key G4 pressed in FSynth-Bass-2 tone on R-ch 260 mV ±20%

Speaker Input Level:

with key D4 pressed in FSynth-Bass-2 tone on L-ch 5200 mV ±20%

with key G4 pressed in FSynth-Bass-2 tone on R-ch 5600 mV ±20%

Minimum Operating Voltage: 5.5 V

REPLACING THE DSP (HG51A115A01FD)

Note: To increase productivity ,the DSP HG51A115A01FD is sticked on the main PCB with a double-side

adhesive tape, then its leads are soldered.

Remove the DSP according to the following procedures.

1. Prepare isopropyl alcohol and a flat IC desoldering machine (Spot Heater HS-600).

2. Apply plenty of the alcohol to the adhesive tape from the reverse side of the main PCB. (Fig. 1)

There is a hole on the PCB just under the LSI, and the adhesive tape can be seen through the hole.

3. Leave it more than one minute so that the alcohol weaken adhesive power fully.

4. Using a proper size of nozzle, apply heat to leads of the LSI with the desoldering machine.

5. Grasp the LSI with tweezers, and using gentle force vibrate the tweezers to feel melting solder. (Fig.2)

6. Remove the LSI after meltingsolder at every leads wholly.

Alcohl

Spot Heater HS-600

Fig.2Fig.1

HG51A115A

LSI-S

— 3 —

BLOCK DIAGRAM

KC0 ~

KC7

SI0 ~ SI7

FI0 ~ FI7

Key Touch LSI

HG52E35P

Working Strage

RAM (256K-bit)

HM62256ALP-10

Working Strage

RAM (256K-bit)

HM62256ALP-10

7-Segment

LED LO0 ~ LO4

LED driver

BA612

LD0 ~ LD7

KO0 ~ KO7

Buttons

KI1 ~ KI7

VDD

Power Switch

MIDI IN

OUT

EA0 ~ EA14

ED0 ~ ED7

DSP

HG51A115A01FD

RA0 ~ RA19

RD0 ~ RD15

Sound Source ROM

(16M-bit)

TC5316200CP-C081

WCK1 SLOP BCK

D/A Converter

UPD6376CX

Filter

Main

Volume

Power Amplifier

LA4620

Gate Array

UPD65005C-578

CPU

HD6433298A18P

Keyboard

A0 ~ A15 POWER

Power Supply Circuit

Q1 ~ Q7

VCC AVDD VDD

LVDD DVDD

APO

Effect RAM

(256K-bit)

HM62256ALP-10

D0~D7

Speakers

Output

A0 ~ A14 A0 ~ A3

A0 ~ A2

LEDs

— 4 —

CIRCUIT DESCRIPTION

Key Matrix

Key

Second contact 2 First contact 1 FI

Note: Each key has two contacts, the first conatct 1 and second contact 2 .

KC0 KC1 KC2 KC3 KC4 KC5 KC6 KC7

FI0 C2 1 C#2 1 D2 1 D#2 1 E2 1 F2 1 F#2 1 G2 1

SI0 C2 2 C#2 2 D2 2 D#2 2 E2 2 F2 2 F#2 2 G2 2

FI1 G#2 1 A2 1 A#2 1 B2 1 C3 1 C#3 1 D3 1 D#3 1

SI1 G#2 2 A2 2 A#2 2 B2 2 C3 2 C#3 2 D3 2 D#3 2

FI2 E3 1 F3 1 F#3 1 G3 1 G#3 1 A3 1 A#3 1 B3 1

SI2 E3 2 F3 2 F#3 2 G3 2 G#3 2 A3 2 A#3 2 B3 2

FI3 C4 1 C#4 1 D4 1 D#4 1 E4 1 F4 1 F#4 1 G4 1

SI3 C4 2 C#4 2 D4 2 D#4 2 E4 2 F4 2 F#4 2 G4 2

FI4 G#4 1 A4 1 A#4 1 B4 1 C5 1 C#5 1 D5 1 D#5 1

SI4 G#4 2 A4 2 A#4 2 B4 2 C5 2 C#5 2 D5 2 D#5 2

FI5 E5 1 F5 1 F#5 1 G5 1 G#5 1 A5 1 A#5 1 B5 1

SI5 E5 2 F5 2 F#5 2 G5 2 G#5 2 A5 2 A#5 2 B5 2

FI6 C6 1 C#6 1 D6 1 D#6 1 E6 1 F6 1 F#6 1 G6 1

SI6 C6 2 C#6 2 D6 2 D#6 2 E6 2 F6 2 F#6 2 G6 2

FI7 G#6 1 A6 1 A#6 1 B6 1 C7 1

SI7 G#6 2 A6 2 A#6 2 B6 2 C7 2

— 5 —

Nomenclature of Keys

F#3 G#3 A#3 C#4 D#4 F#4 G#4 A#4 C#5 D#5 F#5 G#5 A#5

F3 G3 A3 B3 C4 D4 E4 F4 G4 A4 B4 C5 D5 E5 F5 G5 A5 B5 C6

D#3

C2 D2 E2 F2 G2 A2 B2 C3 D3 E3 B6A6G6F6E6D6 C7

C#3A#2G#2

F#2D#2

C#2 A#6

G#6F#6D#6

C#6

Button Matrix

KI1 KI2 KI3 KI4 KI5 KI6 KI7

KO0 Split Layer Upper 1 Lower 1 Lower 2 Upper 2

KO1 Transpose Tune MIDI Jack Rhythm Tone Play Style

KO2 Track 4

Chord 1 Track 5

Chord 2 Track 6

Chord 3 Track 2

Rhythm Track 3

Bass

KO3 3 6 9 Demo Touch

Responce Digital

Effect Resistration

KO4 2 5 8 Track 1 1 4 7

KO5 Accomp.

Volume Song

Memory Accomp. Track 0 - +

KO6 Synchro/

Ending Variation

/Fill-In Normal/

Fill-In Intro F D B

KO7 Mode A C E Start/

Stop Tempo

Down Tempo

Reset Circuit

VDD Battery set

RESET

CPU

HD6433298A18P

Reset IC

S8053ANO

Working Strage RAM

HM62256ALP-10

Gate Array

UPD65005C-578 DSP

HG51A115A01FD

Key Touch LSI

HG52E35

DVDD

VDD

-RESET

WR -SRAM

POWER

From power switch

— 6 —

Pin No. Terminal In/Out Function

1 P40 Out KO signal data output

2 P41 Out Clock for KO signal data

3 P42 Out APO (Auto Power Off) signal output. ON: High, OFF: Low

4 P43 Out Read enable signal output

5 P44 Out Write enable signal output

6 P45 Not used.

7 P46 Out 10MHz clock output

8 P47 In Wait signal input. Connected to +5V.

9 TXD Out MIDI signal output

10 RXD In MIDI signal input

11 P52 Out Reset signal output

12 -RESET In Reset signal input

13 -NMI In Power ON signal input.

14 VCC In +5V source

15 -STBY In Standby signal input. Connected to +5V.

16 VSS In Ground (0V) source

17 XTAL In 20MHz clock input

18 EXTAL In 20MHz clock input

19, 20 MD1, MD0 In Mode selection input. (Internal ROM mode --- MD1: Hight, MD0: Low)

21 AVSS In Ground (0V) source for internal DAC

22 AN0 In Analog input. Connected to the bender volume.

23 ~ 29 P71 ~ P77 In Button input signal input

30 AVCC In +5V source for internal DAC

31 ~ 38 P60 ~ P67 Out LED segment signal output

39 VCC In +5V source

40 ~ 56 P27 ~ P10 Out Address bus

48 VSS In Ground (0V) source

57 ~ 64 P30 ~ P37 Ijn/Out Data bus

Initial reset

When batteries are set or an AC adapter is connected, the reset IC provides a low pulse to the CPU.

The CPU then initializes its internal circuit and clears data in the working strage RAM.

Power ON reset

When the power switch is pressed, the CPU receives a low pulse of POWER signal. The CPU first raises

APO signal to +5V to generat DVDD voltage, then raises RESET signal to +5V. During this period the

gate array, the DSP and the key touch LSI initializes their internal circuit.

CPU (HD6433298A18P)

The 16-bit CPU contains a 32k-bit ROM, a 1k-bit RAM, seven 8-bit I/O ports, an A/D convertor and serial

interfaces. The CPU accesses to the working strage RAM, the DSP and the key touch LSI. The CPU also

controls buttons, LEDs, bender input and MIDI input/output.

— 7 —

Gate Array (UPD65005C-578)

Functions of the gate array are;

(1) To decode chip select signals for the working strage RAM, the DSP and the key touch LSI.

(2) To hold the following signals on "Low" during power off.

Read/write enable signals for the DSP and the key touch LSI

10MHz clock for the key touch LSI

(3) To generate button scan / LED drive signals.

The following table shows the pin functions of the gate array.

A4 ~ A15

D0, D1

PHA

APO

KOD

KOC

RESET

LSIS

SRAM

RDAPO

WRAPO

PHAPO

KO0 ~ KO7

Address decoder

Controller

Shift register

(Chip select sigal for the DSP)

(Chip select signal for the key touch LSI)

(Chip select signal for the working strage RAM)

(Read enable signal controlled by APO)

(Write enable signal controlled by APO)

(10MHz clock for the key touchLSI.

Controlled by APO)

(Button scan / LED drive signal)

Pin No. Terminal In/Out Function

1 -RESET In Reset signal input

2 -RDAPO Out Read enable signal output

3 -WRAPO Out Write enable signal output

4 -LSIS Out Chip select signal for the DSP

5 -HG Out Chip select signal for the key touch LSI

6 PHAPO Out 10MHz clock for the key touch LSI

7 -SRAM Out Chip select signal for the working strage RAM

8 ~ 9 KO8 ~ KO9 Not used.

10 ~ 17 KO7 ~ KO0 Out Button scan / LED drive signal output

18 ~ 20 Not used.

21 GND In Ground (0V) source

22 PHA In 10MHz clock input

23 -WR In Write enable signal input

24 -RD In Read enable signal input

25 -APO In APO (Auto Power Off) signal input

26 KOC In KO signal data input

27 KOD In Clock for KO signal data

28 ~ 39 A15 ~ A4 In Address bus

40, 41 D0, D1 In Data bus

42 VDD In +5V source

— 8 —

Digital Signal Processor (HG51A115A01FD)

Upon receipt of note numbers and their velocities, the DSP reads sound and velocity data from the sound

source ROM in accordance with the selected tone; the DSP can read rhythm data simultaneously when a

rythm pattern is selected. Then it provides 16-bit serial signals containing data of the melody, chord, bass,

and percussion to the DAC. The DSP also adds the selected effect to the sound data using a 256k-bit

RAM.

The following table shows the pin functions of the DSP.

Pin No. Terminal In/Out Function

1 ~ 8 CD0 ~ CD7 In/Out Data bus

9, 10 Not used.

11 GND7 In Ground (0V) source

12 CK16 Out 16.384MHz clock output

13 VCC6 In +5V source

14 CK0 In Clock input. Connected to terminal CK16.

15 TCKB Not used.

16 VCC1 In +5V source

17 GND1 In Ground (0V) source

18, 19 XT0, XT1 In/Out 16.384MHz clock input/output. Connected to a crystal oscillator.

20 SGL In System control terminal. Single chip system: Open

21 CCSB In Chip select signal input

22 ~ 25 CA0 ~ CA3 In Addess bus

26 CE0 In Not used. Connected to ground.

27 CWRB In Write enable signal

28 CRDB In Read enable signal

29 ~ 32 Not used.

33 RESB In Reset signal input

34 TESB In Not used. Connected to +5V.

35 ~ 39 Not used.

40 ~ 49

52 ~ 57 RD0 ~ RD15 In Data bus for the sound source ROM

58 RA23 Out Not used.

59 RA22 Out Chip select signal for the sound source ROM

60, 61 RA20, RA21 Out Not used.

62 ~ 73

75 ~ 82 RA0 ~ RA19 Out Data bus for the sound source ROM

74 GND5 In Ground (0V) source

83 WOK2 Out Word clock output. Not used.

84 VCC3 In +5V source

85 GND3 In Ground (0V) source

86 WOK1 Out Word clock for the DAC

87 SOLM Out Serial data output. Not used.

88 SOLP Out Serial data output for the DAC

89 BOK Out Bit clock output for the DAC

90 ~ 92 Not used.

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