CIRCUIT DESCRIPTION
The following description applies
to
the APOLLO
100
counter timer. Certain sections
are
not applicable
to
the
APOLLO
10.
Refer
to
circuit diagrams for the differ-
ences. NOTE control signals marked with
a'
*' are active
low
e.g. (*
FREQ)
.
1.
POWERSUPPLY(CCT. DIAG.1)
Three separate voltages
are
generat
ed
by the power
supply circuit. These voltages
are
provided by mono-
lithic integrated circuit regulators IC100,
101,
102
and
their associated components. The +5V2, and the
-
5V
supplies
are
used by the pre-amplifier, pre-
scaler and frequency multiplier circuits. The +5V2
supply
is
adjusted by RV100
to
5.2V ±0.05V so that
the
ECL
circuits operate at their optimum voltage.
The +
5V
supply
is
used by the main logic circuits.
Test points TP100,
TP101
, TP102 and TP103
are
pro-
vided for convenient monitoring
of
the power
supplies. All three voltage supplies have built in short
circuit protection. The mains transformer T100 pro-
vides the necessary voltage conversion and isolation
of
the mains supply voltage. Transformer taps are
provided
to
enable conversion
to
110/120V
operation.
Fuse
F100
provides protection against
fault currents. SW100
is
the instrument ON/OFF
switch arid
is
mounted on the rear panel.
2.
PRE-AMPLIFIERS (CCT. DIAG.
2)
S1200 selects the input coupling mode AC,
50
n,
DC
or LPF.
With
the switch in the
50
n position
C1201
and
R1200
terminate the input
with
nominally
50
n,
(the input
is
DC
coupled in this position).
With
DC
selected the input signal
is
directly coupled
to
the
pre-amplifier.
R1201
sets the input impedance
to
1
Mn.
With
S1201
in
the x10 position the input signal
passes through the x10 attenuator,
R1202
and
R1203
perform the voltage division and C1202 and
C1203
provide frequency compensation.
The pre-amplifier
is
protected from excessive input
voltage by
R1204
,
R1239
,
C1204
, D1200, and D1201.
The input coupling components are situated on the
front
panel sub-board, which
is
mounted between
the
front
panel and the
front
panel p.c.b.
01200, 01201 and 01202 form a high input impe-
dance, wide bandwidth voltage follower. The high
input impedance
is
necessary
to
avoid loading the
input coupling and attenuator circuits.
The next stage
of
the pre-amplifier consists
of
two
differential amplifiers 01208, 01209 and 01206,
01207. Amplifier 01206, 01207
is
operative when the
LPF
(low pass filter)
is
selected. Amplifier 01208,
01209
is
operative when AC,
500
or
DC
is
selected.
Normally 01205
is
biased on so that the current
source 01203
is
connected
to
the emitters
of
01208,
01209, so that this amplifier
is
operative. Alterna-
tively
if
the
LPF
is
selected 01204
is
biased on and
01205
is
biased
off
so that the current source
is
con-
nected
to
the emitters
of
01206 and 01207. This
amplifier
is
then operative and the inputsignal passes
through the
low
pass network
R1213
and
C1205
before amplification. The filter components values
are
calculated
to
give a cut
of
frequency
of
nominally
50kHz.
The variable resistor
R1218
is
the front panel
TRIGGER
LEVEL
control and sets the working point
of
the differential amplifiers. Resistor
R1219
is
adjusted during calibration
to
take account
of
com-
ponent tolerances. The emitter follower 01210
applies the working point voltage
to
the
base
of
01206, 01207, 01208, 01209. Diodes D1204 and
D1205
provide temperature compensation
for
the
trigger level control.
The antiphase outputs from the differential amplifier
provide the input
to
IC1200(b). IC1200(b) forms the
main gain stage
of
the pre-amplifier, this
IC
is
an
ECI
differential line driver biased
to
operate
in
the linear
mode
to
provide higher gain. The output from
IC1200(b) feeds
two
circuits
(1)
a Schmitt trigger
ECL
to
TTL converter, 01211, 01212 and 01213. 01213
is
a high speed switcliing transistor
to
ensure the
fastest possible
rise
time. Overall feedback around
this amplifier
is
provided by
R1229
.
(2)
IC1200(c)
buffers the output
of
IC1200(b)
to
provide asignal for
the 100MHz pre-scaler
(see
CCT. DIAG. 3).
3.
FREQUENCY MULTIPLIER
AND
PRE-SCALER
CIRCUITS (CCT. DIAG.
3)
IC1105
is
a +
10
or +
11
pre-scaler.
D1103
pulls pins 2
and 3 high
to
set the pre-scaler
to
the
+-10
mode.
The 10MHz
output
from the pre-scaler
is
inverted by
the Schmitt trigger IC1106(b) and sent
to
the input
selector
(see
CCT. DIAG. 4).
Channel A output from 01213
(see
CCT. DIAG.
3)
is
inverted by IC1106(f) and sent
to
the input selector.
The channel B signal from the pre-amplifier
is
passed
through IC1106(a,c) and sent
to
the Gating and Input
B circuits
(see
CCT. DIAGS.
4and
5).
IC1101
performs level shifting for the input signals
to
the frequency multiplier circuit. This
is
necessary
as
the frequency multiplier circuit operates from dual
supplies. The frequency multiplier function
is
per-
formed by IC1102, IC1103, IC1104 and associated
components, which form a frequency multiplying
PHASE LOCKED LOOP. IC1102
is
a phase locked
loop integrated circuit, containing
two
phase com-
parators, a voltage controlled oscillator (VCO) and a
source follower. IC1103
is
a
two
stage counter which
divides the VCO output by either
10
or
100
and sends
the signal
to
the phase comparator input pin
3.
The
two
multiplier ranges
are
selected by the control lines
(* 100kHz) and (* 10kHz). When the 10kHz range
is
selected the gate IC1104(a)
is
enabled and the divide
by
100
output
of
IC1103
is
sent
to
the phase com-
parator input of IC1102
to
provide a multiplication
factor
of
100.
When the 100kHz range
is
selected the
gate IC1104(b)
is
enabled and the divide by
10
output
from IC1103
is
sent
to
phase comparator input of
IC1102
to
provide amultiplication factor of
10.
The phase comparator
output
(PC
OUT)
is
smoothed
by the filtering components
R1107, R1108,
R1116
,
C1102
and
C1103
to
provide the control voltage for
5
