The incoming video is digitized and processed by the TVP5150A using a
14.318MHz reference crystal to the ITU-601 (formerly known as CCIR601)
specification. All internal timing is generated using this crystal. The video is quantized,
processed for brightness, contrast, chroma gain and hue, among others, and output at
the ITU rate of 27MHz on an 8 bit, time multiplexed bus, with alternating luma and
chroma samples. No other signals are required from this circuit as the ITU
specification describes a method for encrypting the horizontal and vertical timing
information directly into the digital data using timing reference makers, or TRS codes.
A brief description of the ITU-601/656 specification is as follows:
Fundamental quantization frequency: 13.5MHz
Pixel Resolution: 720 H x 486 V NTSC / 720 H x 576 PAL
Image Aspect Ratio: 4:3
Pixel Aspect Ratio: 1.1 NTSC / 0.9 PAL
Horizontal Frequency: 15,734 Hz NTSC / 15,625 Hz PAL
Vertical Frequency: 29.97 Hz NTSC / 25 Hz PAL
Clocks per Line: 1716 NTSC / 1728 PAL (27MHz clock)
Clocks per Frame: 900900 NTSC / 1080000 PAL (27 MHz clock)
Note that the vertical frequency is 29.97Hz for NTSC, not 30Hz as
expected. This is due to the NTSC color system that was first ratified in 1953.
All monochrome television transmissions prior to this standard used exactly
30Hz, or 30 frames per second, so as to be in sync with the AC line frequency.
This is done to reduce distortions in the image due to induced AC fields or
“hum” from the power supplies of these early sets. In order to devise a
“compatible” color system that would show a monochrome signal on existing
sets, RCA proposed a method of modulating the color components of the
video signal onto a subcarrier in the video. For reasons beyond the scope of
this manual, a frequency needed to be chosen so that no standing patterns in
the color signal would result. This required lowering the vertical frequency
from 30Hz to 29.97Hz. While this change caused no adverse side effects on
televisions, it has created a legacy of problems for modern video equipment.
Instead of being able to use integer numbers like 24, 25 and 30, we now have
to include 29.97 which makes many calculations and conversion extremely
difficult. For digital processing, the ratio 1000/1001 has been established as the
conversion between 30 and 29.97 video.
The digital video data is then routed to the FPGA where it is further processed.
The data is sent to the internal field memory in round robin fashion. The field
memory is large enough to hold two frames of video, so there is always enough data
to keep an uninterrupted flow to the output. The video data is scaled prior to storing
in the field memories. This scaling is done with a multi-tap FIR filter for the horizontal
downscaling, and averaging for the vertical. Extra processing like that to stretch the
outer three pixels on each side of a Baird image is also done at this time.
All processing is done synchronous to the ITU clock. Since this clock is much
higher than required for mechanical television rates, it is also used to generate the
output video. Using the same ITU clock, a video timing generator, or flywheel is
