ARM ARM9TDMI Product manual
Copyright © 1998, 1999 ARM Limited. All rights reserved.
ARM DDI0145B
ARM9TDMI
Technical Reference Manual
ii Copyright © 1998, 1999 ARM Limited. All rights reserved. ARM DDI0145B
ARM9TDMI
Technical Reference Manual
Copyright © 1998, 1999 ARM Limited. All rights reserved.
Release Information
Proprietary Notice
ARM, the ARM Powered logo, Thumb and StrongARM are registered trademarks of ARM Limited.
The ARM logo, AMBA, Angel, ARMulator, EmbeddedICE, ModelGen, Multi-ICE, ARM7TDMI,
ARM9TDMI, TDMI and STRONG are trademarks of ARM Limited.
All other products or services mentioned herein may be trademarks of their respective owners.
Neither the whole nor any part of the information contained in, or the product described in, this document
may be adapted or reproduced in any material form except with the prior written permission of the copyright
holder.
The product described in this document is subject to continuous developments and improvements. All
particulars of the product and its use contained in this document are given by ARM in good faith. However,
all warranties implied or expressed, including but not limited to implied warranties of merchantability, or
fitness for purpose, are excluded.
This document is intended only to assist the reader in the use of the product. ARM Limited shall not be liable
for any loss or damage arising from the use of any information in this document, or any error or omission in
such information, or any incorrect use of the product.
Confidentiality Status
This document is Open Access. This document has no restriction on distribution.
Product Status
The information in this document is final, that is for a developed product.
Web Address
http://www.arm.com
Change history
Description Issue Change
November 1998 A First release
July 1999 B Include Rev 2 and minor changes
ARM DDI0145B Copyright © 1998, 1999 ARM Limited. All rights reserved. iii
Contents
ARM9TDMI Technical Reference Manual
Preface
About this document .................................................................................... viii
Further reading .............................................................................................. ix
Typographical conventions ............................................................................ x
Feedback ....................................................................................................... xi
Chapter 1 Introduction
1.1 About the ARM9TDMI ................................................................................. 1-2
1.2 Processor block diagram ............................................................................. 1-3
Chapter 2 Programmer’s Model
2.1 About the programmer’s model ................................................................... 2-2
2.2 Pipeline implementation and interlocks ....................................................... 2-4
Chapter 3 ARM9TDMI Processor Core Memory Interface
3.1 About the memory interface ........................................................................ 3-2
3.2 Instruction interface ..................................................................................... 3-4
3.3 Endian effects for instruction fetches .......................................................... 3-6
3.4 Data interface .............................................................................................. 3-7
3.5 Unidirectional/bidirectional mode interface ............................................... 3-10
3.6 Endian effects for data transfers ............................................................... 3-11
3.7 ARM9TDMI reset behavior ........................................................................ 3-12
Contents
iv Copyright © 1998, 1999 ARM Limited. All rights reserved. ARM DDI0145B
Chapter 4 ARM9TDMI Coprocessor Interface
4.1 About the coprocessor interface ................................................................. 4-2
4.2 LDC/STC .................................................................................................... 4-3
4.3 MCR/MRC .................................................................................................. 4-9
4.4 Interlocked MCR ....................................................................................... 4-11
4.5 CDP .......................................................................................................... 4-13
4.6 Privileged instructions ............................................................................... 4-15
4.7 Busy-waiting and interrupts ...................................................................... 4-16
4.8 Coprocessor 15 MCRs ............................................................................. 4-17
Chapter 5 Debug Support
5.1 About debug ............................................................................................... 5-2
5.2 Debug systems ........................................................................................... 5-3
5.3 Debug interface signals .............................................................................. 5-5
5.4 Scan chains and JTAG interface .............................................................. 5-11
5.5 The JTAG state machine .......................................................................... 5-12
5.6 Test data registers .................................................................................... 5-19
5.7 ARM9TDMI core clocks ............................................................................ 5-26
5.8 Clock switching during debug ................................................................... 5-27
5.9 Clock switching during test ....................................................................... 5-28
5.10 Determining the core state and system state ........................................... 5-29
5.11 Exit from debug state ................................................................................ 5-32
5.12 The behavior of the program counter during debug ................................. 5-35
5.13 EmbeddedICE macrocell .......................................................................... 5-38
5.14 Vector catching ......................................................................................... 5-46
5.15 Single stepping ......................................................................................... 5-47
5.16 Debug communications channel .............................................................. 5-48
Chapter 6 Test Issues
6.1 About testing ............................................................................................... 6-2
6.2 Scan chain 0 bit order ................................................................................. 6-3
Chapter 7 Instruction Cycle Summary and Interlocks
7.1 Instruction cycle times ................................................................................ 7-2
7.2 Interlocks .................................................................................................... 7-5
Chapter 8 ARM9TDMI AC Characteristics
8.1 ARM9TDMI timing diagrams ...................................................................... 8-2
8.2 ARM9TDMI timing parameters ................................................................. 8-14
Appendix A ARM9TDMI Signal Descriptions
A.1 Instruction memory interface signals .......................................................... A-2
A.2 Data memory interface signals ................................................................... A-3
A.3 Coprocessor interface signals .................................................................... A-5
A.4 JTAG and TAP controller signals ............................................................... A-6
A.5 Debug signals ............................................................................................. A-8
Contents
vi Copyright © 1998, 1999 ARM Limited. All rights reserved. ARM DDI0145B
ARM DDI0145B Copyright © 1998, 1999 ARM Limited. All rights reserved. vii
Preface
This preface introduces the ARM9TDMI (Revision 1 and subsequent revisions), which
is a member of the ARM family of general-purpose microprocessors. It contains the
following sections:
•About this document on page viii.
•Further reading on page ix.
•Typographical conventions on page x.
•Feedback on page xi.
Preface
viii Copyright © 1998, 1999 ARM Limited. All rights reserved. ARM DDI0145B
About this document
This document is a reference manual for the ARM9TDMI microprocessor. The
ARM9TDMI includes the following features:
• The option, selectable using the UNIEN signal, of using two unidirectional buses
DD[31:0] and DDIN[31:0], instead of a single bidirectional data bus. This is
described in Unidirectional/bidirectional mode interface on page 3-10.
• The value returned by the JTAG TAP controller IDCODE instruction is the value
present on the new TAPID[31:0] input bus. This allows the ID code to be easily
changed for each chip design.
Intended audience
This document has been written for experienced hardware and software engineers who
may or may not have experience of ARM products.
Preface
ARM DDI0145B Copyright © 1998, 1999 ARM Limited. All rights reserved. ix
Further reading
This section lists publications by ARM Limited, and by third parties.
ARM publications
ARM Architecture Reference Manual (ARM DDI 0100).
ARM7TDMI Data Sheet (ARM DDI 0029).
Other reading
IEEE Std. 1149.1 - 1990, Standard Test Access Port and Boundary-Scan Architecture.
Preface
xCopyright © 1998, 1999 ARM Limited. All rights reserved. ARM DDI0145B
Typographical conventions
The following typographical conventions are used in this document:
bold Highlights ARM processor signal names within text, and interface
elements such as menu names. May also be used for emphasis in
descriptive lists where appropriate.
italic Highlights special terminology, cross-references and citations.
typewriter
Denotes text that may be entered at the keyboard, such as
commands, file names and program names, and source code.
typewriter
Denotes a permitted abbreviation for a command or option. The
underlined text may be entered instead of the full command or
option name.
typewriter italic
Denotes arguments to commands or functions where the argument
is to be replaced by a specific value.
typewriter bold
Denotes language keywords when used outside example code.
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