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Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Measurement Points
The APEK85110 evaluation board contains convenient test points for monitoring the high- and low-side gate drives as well as the
switch node as shown in Figure 5.
When measuring VGS_H, use a differential probe with suitable ratings for the applied bus voltage. The APEK85110 evaluation board
uses a bipolar gate drive arrangement as shown in Figure 6. When measuring VGS, both gate drives are measured relative to the source
of their associated GaN FET. Therefore, the off-state voltage will be negative.
It is important to use a low-inductance scope probe ground lead as shown to avoid pickup of spurious switching noise.
Figure 5: Measurements Points
Bipolar Gate Drive
Due to the high rate of change of voltages and currents in power switching circuits, unwanted inductor currents and capacitor voltage
drops can be created.
One such example is the false turn on of a FET due to a dv/dt event. In a half-bridge circuit, after the low-side FET has been turned
off and a suitable dead-time has elapsed, the high-side FET is turned on. This produces a rapidly changing switch node voltage at the
drain of the low-side FET. This voltage will produce a capacitor current,
iCGD = CGD × (dVDS_L / dt)
flowing in the gate-drain capacitance, CGD, and driver output. It will cause the voltage on the gate of the low-side FET to rise. If this
voltage spike peaks beyond the threshold voltage, VTH, the FET will conduct. Considering that the high-side FET is also conducting,
this can result in a potentially destructive shoot-through event.
The APEK85110 evaluation board uses a bipolar gate drive arrangement which is useful to mitigate against the effects of gate-drain
capacitor currents. The secondary supply voltage, VSEC, is a function of the primary supply voltage, VDRV. The zener diode, CR1, will
regulate the positive turn-on voltage of the GaN FET. During the turn-off of period, the gate voltage will be negative with a value of:
VGS_OFF = VSEC – VZENER. VSEC is typically 9 V.
This negative VGS_OFF voltage allows more margin before the threshold voltage can be reached.
Advance Information
Subject to Change Without Notice
August 30, 2022